| dbo:abstract |
ماي إتش دي إل (بالإنجليزية: MyHDL) هي لغة توصيف عتاد ( في هذه الحالة في إتش دي إل ) تعتمد على بايثون، طورت من طرف . (ar) MyHDL is a Python-based hardware description language (HDL). Features of MyHDL include: * The ability to generate VHDL and Verilog code from a MyHDL design. * The ability to generate a testbench (Conversion of test benches) with test vectors in VHDL or Verilog, based on complex computations in Python. * The ability to convert a list of signals. * The ability to convert output verification. * The ability to do co-simulation with Verilog. * An advanced datatype system, independent of traditional datatypes. MyHDL's translator tool automatically writes conversion functions when the target language requires them. MyHDL is developed by Jan Decaluwe. (en) |
| dbo:wikiPageID |
19863750 (xsd:integer) |
| dbo:wikiPageLength |
4106 (xsd:nonNegativeInteger) |
| dbo:wikiPageRevisionID |
1103034325 (xsd:integer) |
| dbo:wikiPageWikiLink |
dbr:Python_(programming_language) dbr:Electronic_design_automation dbr:VHDL dbr:Verilog dbr:Hardware_description_language dbc:Hardware_description_languages dbr:C_to_HDL dbr:Comparison_of_EDA_Software dbr:Comparison_of_Free_EDA_software |
| dbp:wikiPageUsesTemplate |
dbt:Reflist dbt:Programmable_Logic |
| dct:subject |
dbc:Hardware_description_languages |
| gold:hypernym |
dbr:Python |
| rdf:type |
yago:Abstraction100002137 yago:Communication100033020 yago:Language106282651 yago:WikicatHardwareDescriptionLanguages dbo:Reptile |
| rdfs:comment |
ماي إتش دي إل (بالإنجليزية: MyHDL) هي لغة توصيف عتاد ( في هذه الحالة في إتش دي إل ) تعتمد على بايثون، طورت من طرف . (ar) MyHDL is a Python-based hardware description language (HDL). Features of MyHDL include: * The ability to generate VHDL and Verilog code from a MyHDL design. * The ability to generate a testbench (Conversion of test benches) with test vectors in VHDL or Verilog, based on complex computations in Python. * The ability to convert a list of signals. * The ability to convert output verification. * The ability to do co-simulation with Verilog. * An advanced datatype system, independent of traditional datatypes. MyHDL's translator tool automatically writes conversion functions when the target language requires them. (en) |
| rdfs:label |
ماي إتش دي إل (ar) MyHDL (en) |
| owl:sameAs |
freebase:MyHDL wikidata:MyHDL dbpedia-ar:MyHDL http://hi.dbpedia.org/resource/माई-एचडीएल_(MyHDL) http://ur.dbpedia.org/resource/مائی_ایچ_ڈی_ایل https://global.dbpedia.org/id/4riF7 yago-res:MyHDL |
| prov:wasDerivedFrom |
wikipedia-en:MyHDL?oldid=1103034325&ns=0 |
| foaf:isPrimaryTopicOf |
wikipedia-en:MyHDL |
| is dbo:wikiPageRedirects of |
dbr:Jan_Decaluwe |
| is dbo:wikiPageWikiLink of |
dbr:Python_(programming_language) dbr:List_of_programming_languages_by_type dbr:MicroBlaze dbr:Flow_to_HDL dbr:Hardware_description_language dbr:C_to_HDL dbr:Jan_Decaluwe |
| is foaf:primaryTopic of |
wikipedia-en:MyHDL |