SmartSpice (original) (raw)

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dbo:abstract SmartSpice is a commercial version of SPICE (Simulation Program with Integrated Circuit Emphasis) developed by Silvaco. SmartSpice is used to design complex analog circuits, analyze critical nets, characterize cell libraries, and verify analog mixed-signal designs. SmartSpice is compatible with popular analog design flows and foundry-supplied device models. It supports a reduced design space simulation environment. Among its usages in the electronics industry is Dynamic Timing Analysis. (en) Smartspice是一个高品质的商用级别,用于非线性DC、非线性瞬态和线性AC分析。 Smartspice通过同步计算所有电路组件的行为来仿真电路。通过其众多的可靠模型,SMARTSPICE 基于物理特性和电学参数的仿真来仿真复杂电路的行为。其可仿真包含由下列元件组成的电路和子电路,包括电阻、电容、电感器、互感器、、电流源、、传输线、开关,以及5种最常见的半导体器件:二极管、结型场效应管、双极性晶体管、金屬氧化物半導體場效電晶體和金属半导体场效应管。 Smartspice是精深研发的成果。其具竞争力的速度、高级的收敛性、高度的精确度以及强大的预/后处理能力的特征,使之领先于所有其他的商用电路仿真器。 Smartspice可用于多种操作平台,包括Windows、 UNIX和Linux系统。支持的平台详情如下: * SUN Solaris 9, 10 (64 bits) * Windows XP (32 bits) * Red Hat Enterprise Linux 3, 4 (32 bits) * Red Hat Enterprise Linux 3, 4 (64 bits) Smartspice可仿真电路的大小仅受电脑硬件和操作系统的限制。 (zh)
dbo:wikiPageExternalLink http://www.silvaco.com/products/circuit_simulation/smartspice.html http://www.silvaco.com
dbo:wikiPageID 8532890 (xsd:integer)
dbo:wikiPageLength 3034 (xsd:nonNegativeInteger)
dbo:wikiPageRevisionID 925470167 (xsd:integer)
dbo:wikiPageWikiLink dbr:Electronics_industry dbr:HSPICE dbr:Verilog-A dbr:SPICE dbr:Monte_Carlo_method dbr:Silvaco dbr:Analog_circuit dbr:EKV_MOSFET_Model dbc:Electronic_circuit_simulators dbc:Electronic_design_automation_software dbr:Ramtron dbr:Cadence_Design
dct:subject dbc:Electronic_circuit_simulators dbc:Electronic_design_automation_software
gold:hypernym dbr:Version
rdf:type dbo:Work yago:Artifact100021939 yago:Device103183080 yago:Instrumentality103575240 yago:Machine103699975 yago:Object100002684 yago:PhysicalEntity100001930 yago:Simulator104221823 yago:Whole100003553 yago:WikicatElectronicCircuitSimulators
rdfs:comment SmartSpice is a commercial version of SPICE (Simulation Program with Integrated Circuit Emphasis) developed by Silvaco. SmartSpice is used to design complex analog circuits, analyze critical nets, characterize cell libraries, and verify analog mixed-signal designs. SmartSpice is compatible with popular analog design flows and foundry-supplied device models. It supports a reduced design space simulation environment. Among its usages in the electronics industry is Dynamic Timing Analysis. (en) Smartspice是一个高品质的商用级别,用于非线性DC、非线性瞬态和线性AC分析。 Smartspice通过同步计算所有电路组件的行为来仿真电路。通过其众多的可靠模型,SMARTSPICE 基于物理特性和电学参数的仿真来仿真复杂电路的行为。其可仿真包含由下列元件组成的电路和子电路,包括电阻、电容、电感器、互感器、、电流源、、传输线、开关,以及5种最常见的半导体器件:二极管、结型场效应管、双极性晶体管、金屬氧化物半導體場效電晶體和金属半导体场效应管。 Smartspice是精深研发的成果。其具竞争力的速度、高级的收敛性、高度的精确度以及强大的预/后处理能力的特征,使之领先于所有其他的商用电路仿真器。 Smartspice可用于多种操作平台,包括Windows、 UNIX和Linux系统。支持的平台详情如下: * SUN Solaris 9, 10 (64 bits) * Windows XP (32 bits) * Red Hat Enterprise Linux 3, 4 (32 bits) * Red Hat Enterprise Linux 3, 4 (64 bits) Smartspice可仿真电路的大小仅受电脑硬件和操作系统的限制。 (zh)
rdfs:label SmartSpice (en) Smartspice (zh)
owl:sameAs freebase:SmartSpice yago-res:SmartSpice wikidata:SmartSpice dbpedia-zh:SmartSpice https://global.dbpedia.org/id/4ubx5
prov:wasDerivedFrom wikipedia-en:SmartSpice?oldid=925470167&ns=0
foaf:isPrimaryTopicOf wikipedia-en:SmartSpice
is dbo:wikiPageRedirects of dbr:Smartspice
is dbo:wikiPageWikiLink of dbr:Silvaco dbr:Silvaco_Data_Systems_v._Intel_Corp. dbr:List_of_EDA_companies dbr:Smartspice
is foaf:primaryTopic of wikipedia-en:SmartSpice