MCST-R2000 (original) (raw)
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MCST R2000
| General information | |
|---|---|
| Launched | 2018; 6 years ago (2018) |
| Designed by | MCST |
| Common manufacturer | TSMC |
| Performance | |
| Max. CPU clock rate | 2 GHz |
| Architecture and classification | |
| Instruction set | SPARC V9 |
| Physical specifications | |
| Cores | 8 |
| History | |
| Predecessor | MCST-R1000 |
The MCST R2000, (e90), (Russian: МЦСТ R2000) is a 64-bit microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC.[1][2]
MCST R2000 Highlights
[edit]
- implements the SPARC V9 instruction set architecture (ISA)
- octa-core
- core specifications:
- out-of-order, dual-issue superscalar[3]
* two integer units
* one floating-point unit
- out-of-order, dual-issue superscalar[3]
- integrated memory controller
- integrated ccNUMA controller
- 2 GHz clock rate
- 28 nm process
- ~500 million transistors
- ^ "Создатели "Эльбрусов" выпускают процессор альтернативной архитектуры впервые за семь лет". CNews.ru. Retrieved 2019-07-13.
- ^ "Показан новый российский 8-ядерный 28-нм процессор МЦСТ R-2000". Техносфера Россия (in Russian). 2018-04-17. Retrieved 2019-07-13.
- ^ Разработка генератора тестов для верификации механизма «байпас» в конвейере микропроцессора МЦСТ R2000 (PDF) (in Russian), MCST, retrieved 2019-07-13