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// // Generated by LLVM NVPTX Back-End // .version 3.2 .target sm_35 .address_size 64 // .globl _Z3fooiPi // @_Z3fooiPi .visible .entry _Z3fooiPi( .param .u32 _Z3fooiPi_param_0, .param .u64 _Z3fooiPi_param_1 ) { .reg .pred %p<3>; .reg .s32 %r<2>; .reg .s64 %rd<11>; // BB#0: ld.param.u32 %r1, [_Z3fooiPi_param_0]; setp.lt.s32 %p1, %r1, 1; @%p1 bra BB0_3; // BB#1: // %.lr.ph ld.param.u64 %rd9, [_Z3fooiPi_param_1]; cvt.s64.s32 %rd1, %r1; mov.u64 %rd10, 0; BB0_2: // =>This Inner Loop Header: Depth=1 mul.lo.s64 %rd8, %rd10, %rd10; st.u32 [%rd9], %rd8; add.s64 %rd10, %rd10, 3; add.s64 %rd9, %rd9, 12; setp.lt.s64 %p2, %rd10, %rd1; @%p2 bra BB0_2; BB0_3: // %._crit_edge ret; }