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From SDNode and MachineInstr class, I see no link between them and IR/SDNode. The other places you can check are SelectionDAGBuilder \[1\] and InstrEmitter \[1\], which responsible for translating IR to SDNode, and SDNode to MachineInstr respectively.
I know you can retrieve the corresponding BasicBlock for a MachineBasicBlock, which is easy. However, since we will do lowering and combine during IR to SDNode transformation, I think it's hard to track the relationship. Not sure it's the same for SDNode to MachineInstr transformation, though.
2017-11-26 8:58 GMT+08:00 Jonathan via llvm-dev <llvm-dev@lists.llvm.org>:
The llvm backend uses class Instruction in IR handle stage, create SDVaule and DAG in DAG translation stage and class MachineInstr in Machine instruction translation stage.
Can I access class Instruction from DAG structure or stage, or access DAG and Instruction from MachineInstr structure or stage?
Jonathan
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