(original) (raw)
You need a register in the outs list too. To inform everything that your instruction produces an output. And it needs to be a different name than raandra and raandrb. So let's say rdfordestination.Youneedtodothis:<div><br></div><div><fontface="monospace,monospace">letConstraints="rd for destination. You need to do this:<div><br></div><div><font face="monospace, monospace">let Constraints = "rdfordestination.Youneedtodothis:<div><br></div><div><fontface="monospace,monospace">letConstraints="ra = rd"</font></div><div><spanstyle="color:rgb(0,0,0);font−size:16px;font−family:"CourierNew",monospace">defADDR:F_R<0b000000,(outsCPURegs:rd"</font></div><div><span style="color:rgb(0,0,0);font-size:16px;font-family:"Courier New",monospace">def ADDR : F\_R<0b000000,(outs CPURegs:rd"</font></div><div><spanstyle="color:rgb(0,0,0);font−size:16px;font−family:"CourierNew",monospace">defADDR:F_R<0b000000,(outsCPURegs:rd) , (ins CPURegs:$rb, CPURegs:$ra),"ADDR ra,ra, ra,rb",\[(set CPURegs:$rd, (add CPURegs:$ra, CPURegs:$rb))\] >;
The Constraints line will tell the register allocation system that raandra and raandrd should always be the same physical register.
\~Craig
On Tue, Oct 16, 2018 at 5:30 PM m m via llvm-dev <llvm-dev@lists.llvm.org> wrote:
Hi,
Absolute LLVM newbie here. I am trying to define an add instruction which takes 2 register inputs ra and rb and writes the sum into ra.
def ADDR : F\_R<0b000000,(outs) , (ins CPURegs:$rb, CPURegs:$ra),"ADDR ra,ra, ra,rb",\[(set CPURegs:$ra, (add CPURegs:$ra, CPURegs:$rb))\] >;
I get this error:error: In ADDR: Operand $rb does not exist in operand list!
Does anybody know what that means?
Thanks.
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