(original) (raw)

On Feb 1, 2019, at 2:25 PM, Eli Friedman via llvm-dev <llvm-dev@lists.llvm.org> wrote:

I was thinking of a model something like this: 32-bit pointers are addrspace 0, 64-bit pointers are addrspace 1\. ISD::LOAD/STORE in addrspace 0 are not legal: they're custom-lowered to operations in addrspace 1\. (An addrspacecast from 0 to 1 is just zero-extension.) At that point, since the cast from 32 bits to 64 bits is explicitly represented, we can optimize it in the DAG or IR. For example, we can transform a load of an inbounds gep in addrspace 0 into to a load of an inbounds gep in addrspace 1.