RISC-V International (original) (raw)
Events
Registration Open for RISC-V Summit Europe 2026
Events
Hands-on RISC-V Developer Workshops – 8 June, Bologna
Reports
RISC-V Annual Report 2025
Read the RISC-V Annual Report to discover why 2025 was a defining year for the open standard ISA.
SPECIFICATION
The Technical Backbone of RISC-V
The RISC-V instruction set architecture (ISA) and related specifications are developed, ratified and maintained by contributing members within the Technical Working Groups. Download the latest releases, and get involved.
INDUSTRIES
RISC-V & Automotive
RISC-V is revolutionizing the automotive industry by providing a flexible and open architecture that enables customized, efficient computing solutions for advanced driver-assistance systems (ADAS) and autonomous vehicles.
INDUSTRIES
RISC-V & Artificial Intelligence
The RISC-V ISA is a common language for the development of AI systems, enabling a software based approach to hardware which unleashes a new level of compute and algorithm innovation, along with a better business case for bringing these new ideas to market.
