Design of Microprocessor-Based Systems (W'15) (original) (raw)
Course Description
This class is focused on the principles and practices of modern embedded systems design. In class, we will focus on computer architecture beyond the CPU, fundamentals of the hardware/software interface, techniques for sensing and controlling the physical world, and a few other topics. New this term, we will also introduce the Intel Edison IoT platform as an alternate platform for some assignments and projects. In lab, we will focus on the ARM Cortex-M3, Actel FPGAs, and other supporting hardware, to learn how to design, build, and program embedded systems. Labs during the first half of the course will focus on essential topics. The second half of the course will focus on the design and implementation of non-trivial, open-ended project involving both hardware and software. The labs and project will require a substantial amount of time -- this is a lab-intensive class with a heavy workload.
Syllabus (Tentative)
Week | Date | Topic | Lead(s) | Labs/Homeworks |
---|---|---|---|---|
1 | Sep 9 | Introduction (PPT) | Dutta | Lab # 1 : Hardware Tools HW # 1 : Comb & Seq Logic Design |
ARM System Architecture | ||||
2 | Sep 14 | Arch, Assembly, ABI (PPT) updated | Dutta | Lab # 2 : Software Tools HW # 2 : Programming Linked Lists |
Sep 16 | Assembly, ABI, Toolchains (PPT) cont. | Dutta | ||
3 | Sep 21 | MMIO and Busses (PPT) | Dutta | Lab # 3 : Memory-Mapped I/O HW # 3 : ARM Assembly |
Sep 23 | Memory/Peripheral Bus: AMBA (PPT) | Dutta | ||
4 | Sep 28 | Interrupts (PPT) | Dutta | Lab # 4 : Interrupts HW # 4 : Programming w/ Pointers & followup |
Sep 30 | Interrupts (cont), ARM NVIC (PPT) | Dutta | ||
5 | Oct 5 | Timers (PPT) | Dutta | Lab # 5 : Clocks, Counters, and Timers |
Oct 7 | Timers (cont) and Digital I/O | Dutta | ||
Peripheral Interfacing | ||||
6 | Oct 12 | Serial buses: UART, SPI, and I2C (PPT) | Dutta | Lab # 5 : Clocks, Counters, and Timers HW # 5 : Practice Midterm |
Oct 14 | Project Overview | Smith | ||
7 | Oct 19 | NO LECTURE: Fall Break | Lab # 6 : Serial Bus Interfacing | |
Oct 21 | ADCs/DACs (PPT) | Dutta | ||
8 | Oct 26 | Catch up and Review | Dutta | Lab # 6 : Serial Bus Interfacing |
Oct 28 | Midterm Exam | |||
9 | Nov 2 | NO LECTURE: Work on Projects | Dutta | Lab # 7 : ADC/DAC Data Converters |
Nov 4 | NO LECTURE: Work on Projects | Dutta | ||
Projects | ||||
10 | Nov 9 | Embedded Operating Systems (PPT) | Dutta | Projects |
Nov 11 | Printed Circuit Board Design (PPT) | Dutta | ||
11 | Nov 16 | NO LECTURE: Work on Presentations | Projects | |
Nov 18 | ||||
12 | Nov 23 | Special Topics | Students | Projects |
Nov 25 | NO LECTURE: Work on Projects | |||
13 | Nov 30 | Special Topics | Students | Projects |
Dec 2 | NO LECTURE: Work on Projects | |||
14 | Dec 7 | NO LECTURE: Work on Projects | Projects | |
Dec 9 | NO LECTURE: Work on Projects | |||
15 | Dec 14 | Demo & Poster Session Time: 1:30-3:30 PM (setup at 1:00 PM) Room: Tishman Hall (BBB Atrium) | Students | Projects / Teardown / Parts Return |
16 | Dec 14toDec 16 | Take-Home Final Exam TimeOut: 6:00 PM, Dec 14Due: 6:00 PM, Dec 16 | Students |
Prerequisites
The curricular prequisites for this class include EECS 270(Introduction to Logic Design), EECS 280 (Programming and Introductory Data Structures), and EECS 370 (Introduction to Computer Organization). Thecourse bulletin outlines the contents of these courses. In general, students are expected to have a firm grasp on combinational and sequential logic design, be familiar with assembly language programming (for some architecture), be proficient in C programming, and know their way around the elements of a computer. In addition, success in this course will require substantial reading and hacking, and students will need a high degree of patience and determination.
Policies
Honor Code. The Engineering Honor Code applies to all assignments and exams.
Learn Concepts Together through Discussion. Verbal collaboration between members of different groups is permitted for the purpose of helping classmates to understand concepts essential to the labs or providing one another with insights into the best way to approach the in-lab assignments.
Do Your Own Work. Individual assignments (e.g., prelabs, homeworks, and exams) are to be performed on your own. Group assignments (e.g., labs, lab reports, and postlabs) are to be performed only by members of the group. Non-verbal collaboration (e.g. drawing sample schematics on paper or the whiteboard, sharing schematics or code) is not allowed. You may not help debug another group's hardware or software without consent from the lab or course instructor. You are also not allowed to possess, look at, use, or in any way derive advantage from the existence of code, lab reports, or other material prepared in prior years.
Attend Your Registered Lab. You are expected to attend the lab section for which you are registered. If you would like to switch lab sections, but the section you want is full, you must find someone in that lab section to swap positions with you. Once you have agreed on a swap, send email to Matt Smith. All section swaps must be completed before the second week of lab.
Prelabs. Prelabs are due in lab during the week the lab is to start. All prelabs must be turned in within the 20 minutes after the offical start of lab (on the half hour) (to allow for tardiness, printing problems, etc.) or you will only get 50% of the credit otherwise earned. Prelabs more than one week late will earn no credit. For any labs which span multiple weeks, the prelab is due during the first week of that lab. Prelabs are to be done individually unless otherwise specified in the lab itself.
Postlabs. Postlabs are due in lab the week after the last week of that lab. They are due 20 minutes after the start of that lab period. Just like prelabs, late labs earn only 50% of the credit otherwise earned and postlabs which are more than one week late get no credit. Postlabs are to be done by the group unless otherwise specified in the lab itself.
In-Labs. In-labs are due by Friday of the last week of the lab in open lab hours (you are welcome to turn it in before this and most students do). One of the lab instructors must sign your in-lab form by that time for the in-lab to be on time. You should hand in the signed (and dated) in-lab form with your postlab. Late in-labs lose 10% of their value per business day (Monday though Friday not including holidays) they are late. You may only work with your lab group (generally one other person) on your in-lab.
Grading
Item | Weight | Description |
---|---|---|
Labs | 25% | Seven labs. |
Project | 25% | Group project demonstrating understanding of major topics. |
Exams | 35% | Two exams: Midterm (15%); Final (20%). |
Homework | 10% | Approximately five homework/programming assignments weighted roughly equally. |
Presentation | 4% | Group presentation to class. |
Feedback | 1% | Complete course evaluation and forward acknowledgement to: eecs-evals@umich.edu |
Resources
- Combinational Logic Tutorial
- Sequential Logic Tutorial
- Toolchain Tutorial
- ARMv7 Architecture Reference Manual
- ARM Cortex-M3 Technical Reference Manual v2.1
- ARM and Thumb-2 Instruction Set Quick Reference Card
- ARM Architecture Procedure Call Standard (EABI)
- ARM Cortex-M3 Embedded Software Development (AN-179)
- Actel SmartFusion MSS User Guide
- Actel SmartFusion Analog User Guide
- Actel A2F Eval Kit User Guide
- CodeSourcery Getting Started
- GNU Assembler
- GNU Compiler
- GNU Linker
- Linkers and Loaders
- GNU Debugger
- GNU Binary Utilities
- I2C Bus
- FitBit Surge Teardown