cpu.arm.64.assembler vocabulary - Factor Documentation (original) (raw)
Summary
Metadata
| Parents: | cpu.arm.64 |
|---|---|
| Authors: | Giftpflanze |
Words
Tuple classes
| Class | Superclass | Slots |
|---|---|---|
 element-error |
 tuple |
element element-width transitions |
| extended-register |
operand |
|
| fp-register |
register |
|
| general-register |
register |
|
| immediate-error |
tuple |
n |
| immediate-width-error |
tuple |
n bits |
| logical-immediate-error |
tuple |
imm imm-width |
| offset |
tuple |
register offset type |
| operand |
tuple |
register amount type |
| register |
tuple |
n width |
| register-mismatch |
tuple |
Rt Rt2 |
| register-type-error |
tuple |
reg |
| register-width-error |
tuple |
reg |
| register-width-mismatch |
tuple |
registers |
| scaling-error |
tuple |
n shift |
| shifted-register |
operand |
|
| stack-register |
general-register |
|
| unknown-c-type |
tuple |
c-type |
| vector-register |
register |
|
| zero-register |
general-register |
Predicate classes
Union classes
| add/sub-immediate |
|---|
| logical-immediate |
Generic words
| Word | Stack effect |
|---|---|
 ADD |
( Rd Rn operand -- ) |
| ADDS |
( Rd Rn operand -- ) |
| AND |
( Rn Rm operand -- ) |
| ANDS |
( Rn Rm operand -- ) |
| ASR |
( Rd Rn operand -- ) |
| B |
( label/imm19 -- ) |
| B.cond |
( label/imm19 cond -- ) |
| BIC |
( Rn Rm operand -- ) |
| BICS |
( Rn Rm operand -- ) |
| BL |
( label/imm19 -- ) |
| CBNZ |
( Rt label/imm19 -- ) |
| CBZ |
( Rt label/imm19 -- ) |
| EON |
( Rn Rm operand -- ) |
| EOR |
( Rn Rm operand -- ) |
| LDR |
( Rt operand -- ) |
| LDR* |
( Rt operand c-type -- ) |
| LDRB |
( Rt operand -- ) |
| LDRH |
( Rt operand -- ) |
| LDRSB |
( Rt operand -- ) |
| LDRSH |
( Rt operand -- ) |
| LDRSW |
( Rt operand -- ) |
| LSL |
( Rd Rn operand -- ) |
| LSR |
( Rd Rn operand -- ) |
| MOV |
( Rd operand -- ) |
| NEG |
( Rd operand -- ) |
| NEGS |
( Rd operand -- ) |
| ORN |
( Rn Rm operand -- ) |
| ORR |
( Rn Rm operand -- ) |
| ROR |
( Rd Rn operand -- ) |
| STR |
( Rt operand -- ) |
| STR* |
( Rt operand c-type -- ) |
| STRB |
( Rt operand -- ) |
| STRH |
( Rt operand -- ) |
| SUB |
( Rd Rn operand -- ) |
| SUBS |
( Rd Rn operand -- ) |
| [+] |
( Xn operand -- offset ) |
| encode-type |
( reg -- n ) |
| encode-width |
( reg -- sf/opc ) |
| encode-width* |
( reg -- opc VR ) |
| encode-width** |
( reg -- size VR opc1 shift ) |
| encode-width*** |
( reg -- ftype ) |
| split-add/sub-immediate |
( imm -- sh imm12 ) |
Macro words
| Word | Stack effect |
|---|---|
 (nencode-width) |
( n -- quot ) |
| (nencode-width***) |
( n -- quot ) |
| encode |
( bitspec -- quot ) |
Ordinary words
| Word | Stack effect |
|---|---|
| ((load/store-register)) |
( Rt size VR opc1 Rn offset type L -- ) |
| (ADR) |
( Xd imm op -- ) |
| (LDR=) |
( Rt -- class ) |
| (LDR=BLR) |
( -- class ) |
| (LDR=BR) |
( -- class ) |
| (RET) |
( Xn -- ) |
| (load/store-register) |
( Rt operand size VR opc1 sh L -- ) |
| (load/store-register-register) |
( Rt operand size VR opc1 L -- ) |
| (logical-immediate?) |
( imm imm-width -- ? ) |
| 1encode-width |
( Rn -- Rn w ) |
| 1encode-width*** |
( R -- R ftype ) |
| 2encode-width |
( Rn1 Rn2 -- Rn1 Rn2 w ) |
| 2encode-width* |
( Rt Rt2 -- Rt Rt2 opc VR ) |
| 2encode-width*** |
( Rd Rn -- Rd Rn ftype ) |
| 3encode-width |
( Rn1 Rn2 Rn3 -- Rn1 Rn2 Rn3 w ) |
| 3encode-width*** |
( Rd Rn Rm -- Rd Rn Rm ftype ) |
| 4encode-width |
( Rn1 Rn2 Rn3 Rn4 -- Rn1 Rn2 Rn3 Rn4 w ) |
| |
( Rm uimm5/6 -- sr ) |
| <LSL*> |
( Rm uimm3 -- er ) |
| |
( Rm uimm5/6 -- sr ) |
| |
( Rm uimm5/6 -- sr ) |
| |
( Rm uimm5/6 -- sr ) |
| |
( Rm uimm3 -- er ) |
| |
( Rm uimm3 -- er ) |
| |
( Rm uimm3 -- er ) |
| |
( Rm uimm3 -- er ) |
| |
( Rm uimm3 -- er ) |
| |
( Rm uimm3 -- er ) |
| |
( Rm uimm3 -- er ) |
| |
( Rm uimm3 -- er ) |
| |
( register amount type -- extended-register ) |
| |
( register offset type -- offset ) |
| |
( Rm amount type -- sr ) |
| >32-bit |
( reg -- new-reg ) |
| >64-bit |
( reg -- new-reg ) |
| >offset< |
( index/offset -- register offset type ) |
| >operand< |
( operand -- register type amount ) |
| >zero-register |
( reg -- new-reg ) |
| ?>> |
( n shift -- n' ) |
| ABSv |
( Rd Rn size -- ) |
| ADDPv |
( Rd Rn Rm size -- ) |
| ADDV |
( Rd Rn size -- ) |
| ADDv |
( Rd Rn Rm size -- ) |
| ADR |
( Xd imm -- ) |
| ADRP |
( Xd imm -- ) |
 AL |
( -- value ) |
| ANDv |
( Rd Rn Rm -- ) |
| ASRV |
( Rd Rn Rm -- ) |
| BEQ |
( imm19 -- ) |
| BFM |
( Rd Rn immr imms -- ) |
| BGE |
( imm19 -- ) |
| BGT |
( imm19 -- ) |
| BHI |
( imm19 -- ) |
| BHS |
( imm19 -- ) |
| BICv |
( Rd Rn Rm -- ) |
| BLE |
( imm19 -- ) |
| BLO |
( imm19 -- ) |
| BLR |
( Xn -- ) |
| BLS |
( imm19 -- ) |
| BLT |
( imm19 -- ) |
| BNE |
( imm19 -- ) |
| BR |
( Xn -- ) |
| BRK |
( imm16 -- ) |
| BVC |
( imm19 -- ) |
| BVS |
( imm19 -- ) |
| CACHE-MISS |
( -- value ) |
| CARDS-OFFSET |
( -- value ) |
| CC |
( -- value ) |
| CLS |
( Rd Rn -- ) |
| CLZ |
( Rd Rn -- ) |
| CMEQ |
( Rd Rn Rm size -- ) |
| CMGE |
( Rd Rn Rm size -- ) |
| CMGT |
( Rd Rn Rm size -- ) |
| CMHI |
( Rd Rn Rm size -- ) |
| CMHS |
( Rd Rn Rm size -- ) |
| CMN |
( Rn operand -- ) |
| CMP |
( Rn operand -- ) |
| CNTv |
( Rd Rn -- ) |
| CS |
( -- value ) |
| CSEL |
( Rd Rn Rm cond -- ) |
| CSINC |
( Rd Rn Rm cond -- ) |
| CSINV |
( Rd Rn Rm cond -- ) |
| CSNEG |
( Rd Rn Rm cond -- ) |
| CTX |
( -- value ) |
| DECKS-OFFSET |
( -- value ) |
| DS |
( -- value ) |
| EORv |
( Rd Rn Rm -- ) |
| EQ |
( -- value ) |
| EXT |
( Rd Rn Rm imm4 -- ) |
| FABSv |
( Rd Rn size -- ) |
| FADDs |
( Rd Rn Rm -- ) |
| FADDv |
( Rd Rn Rm size -- ) |
| FCMEQ |
( Rd Rn Rm size -- ) |
| FCMGE |
( Rd Rn Rm size -- ) |
| FCMGT |
( Rd Rn Rm size -- ) |
| FCMP |
( Rn Rm -- ) |
| FCMPE |
( Rn Rm -- ) |
| FCVT |
( Rd Rn -- ) |
| FCVTN |
( Rd Rn size -- ) |
| FCVTZSsi |
( Rd Rn -- ) |
| FCVTZSvi |
( Rd Rn spec* -- ) |
| FDIVs |
( Rd Rn Rm -- ) |
| FDIVv |
( Rd Rn Rm size -- ) |
| FMAXs |
( Rd Rn Rm -- ) |
| FMAXv |
( Rd Rn Rm size -- ) |
| FMINs |
( Rd Rn Rm -- ) |
| FMINv |
( Rd Rn Rm size -- ) |
| FMOV |
( Rd Rn -- ) |
| FMOVgen |
( Rd Rn -- ) |
| FMOVr |
( Rd Rn -- ) |
| FMULs |
( Rd Rn Rm -- ) |
| FMULv |
( Rd Rn Rm size -- ) |
| FP |
( -- value ) |
| FPSR |
( -- value ) |
| FSQRTs |
( Rd Rn -- ) |
| FSQRTv |
( Rd Rn size -- ) |
| FSUBs |
( Rd Rn Rm -- ) |
| FSUBv |
( Rd Rn Rm size -- ) |
| GE |
( -- value ) |
| GT |
( -- value ) |
| HI |
( -- value ) |
| HS |
( -- value ) |
| INSelt |
( Rd Rn immd immn rep -- ) |
| INSgen |
( Rd Rn imm rep -- ) |
| IP0 |
( -- value ) |
| IP1 |
( -- value ) |
| LDP |
( Rt Rt2 offset -- ) |
| LDR= |
( Rt -- word class ) |
| LDR=BLR |
( -- word class ) |
| LDR=BR |
( -- word class ) |
| LDUR |
( Rt operand -- ) |
| LE |
( -- value ) |
| LO |
( -- value ) |
| LR |
( -- value ) |
| LS |
( -- value ) |
| LSLV |
( Rd Rn Rm -- ) |
| LSRV |
( Rd Rn Rm -- ) |
| LT |
( -- value ) |
| MADD |
( Rd Rn Rm Ra -- ) |
| MEGA-HITS |
( -- value ) |
| MI |
( -- value ) |
| MOVK |
( Rd imm16 hw -- ) |
| MOVN |
( Rd imm16 hw -- ) |
| MOVZ |
( Rd imm16 hw -- ) |
| MRS |
( Rt o0:op1:CRn:CRm:op2 -- ) |
| MSR |
( o0:op1:CRn:CRm:op2 Rt -- ) |
| MSUB |
( Rd Rn Rm Ra -- ) |
| MUL |
( Rd Rn Rm -- ) |
| MULv |
( Rd Rn Rm size -- ) |
| MVN |
( Rd operand -- ) |
| MVNv |
( Rd Rn -- ) |
| NE |
( -- value ) |
| NEGv |
( Rd Rn size -- ) |
| NOP |
( -- ) |
| NV |
( -- value ) |
| NZCV |
( -- value ) |
| Nimmrimms |
( imm imm-width -- N imms immr ) |
| Nimms |
( element-bits element-width -- N imms ) |
| ORRv |
( Rd Rn Rm -- ) |
| PIC-TAIL |
( -- value ) |
| PL |
( -- value ) |
| PR |
( -- value ) |
| R |
( Rn -- n ) |
| R/SP |
( Rn -- n ) |
| R/ZR |
( Rn -- n ) |
| RET |
( -- ) |
| RETURN |
( -- value ) |
| RORV |
( Rd Rn Rm -- ) |
| RS |
( -- value ) |
| SABD |
( Rd Rn Rm size -- ) |
| SAFEPOINT |
( -- value ) |
| SBFM |
( Rd Rn immr imms -- ) |
| SCVTFsi |
( Rd Rn -- ) |
| SCVTFvi |
( Rd Rn spec -- ) |
| SDIV |
( Rd Rn Rm -- ) |
| SDOT |
( Rd Rn Rm size -- ) |
| SHADD |
( Rd Rn Rm size -- ) |
| SHL |
( Rd Rn imm rep -- ) |
| SHLL |
( Rd Rn size -- ) |
| SMAXv |
( Rd Rn Rm size -- ) |
| SMINv |
( Rd Rn Rm size -- ) |
| SMOV |
( Rd Rn imm rep -- ) |
| SMULH |
( Xd Xn Xm -- ) |
| SP |
( -- value ) |
| SQADD |
( Rd Rn Rm size -- ) |
| SQSUB |
( Rd Rn Rm size -- ) |
| SQXTN |
( Rd Rn size -- ) |
| SQXTN2 |
( Rd Rn size -- ) |
| SQXTUN |
( Rd Rn size -- ) |
| SQXTUN2 |
( Rd Rn size -- ) |
| SSHL |
( Rd Rn Rm size -- ) |
| SSHLL |
( Rd Rn imm rep -- ) |
| SSHR |
( Rd Rn imm rep -- ) |
| STP |
( Rt Rt2 offset -- ) |
| SUBv |
( Rd Rn Rm size -- ) |
| SXTL |
( Rd Rn rep -- ) |
| TBL |
( Rd Rn Rm -- ) |
| TBNZ |
( Rt imm6 imm14 -- ) |
| TBX |
( Rd Rn Rm -- ) |
| TBZ |
( Rt imm6 imm14 -- ) |
| TRN1 |
( Rd Rn Rm spec -- ) |
| TRN2 |
( Rd Rn Rm spec -- ) |
| TST |
( Rn operand -- ) |
| UABD |
( Rd Rn Rm size -- ) |
| UBFIZ |
( Rd Rn lsb width -- ) |
| UBFM |
( Rd Rn immr imms -- ) |
| UDIV |
( Rd Rn Rm -- ) |
| UDOT |
( Rd Rn Rm size -- ) |
| UHADD |
( Rd Rn Rm size -- ) |
| UMAXv |
( Rd Rn Rm size -- ) |
| UMINv |
( Rd Rn Rm size -- ) |
| UMOV |
( Rd Rn imm rep -- ) |
| UMULH |
( Xd Xn Xm -- ) |
| UQADD |
( Rd Rn Rm size -- ) |
| UQSUB |
( Rd Rn Rm size -- ) |
| USHL |
( Rd Rn Rm size -- ) |
| USHR |
( Rd Rn imm rep -- ) |
| V |
( Vn -- n ) |
| V0 |
( -- value ) |
| V1 |
( -- value ) |
| V10 |
( -- value ) |
| V11 |
( -- value ) |
| V12 |
( -- value ) |
| V13 |
( -- value ) |
| V14 |
( -- value ) |
| V15 |
( -- value ) |
| V16 |
( -- value ) |
| V17 |
( -- value ) |
| V18 |
( -- value ) |
| V19 |
( -- value ) |
| V2 |
( -- value ) |
| V20 |
( -- value ) |
| V21 |
( -- value ) |
| V22 |
( -- value ) |
| V23 |
( -- value ) |
| V24 |
( -- value ) |
| V25 |
( -- value ) |
| V26 |
( -- value ) |
| V27 |
( -- value ) |
| V28 |
( -- value ) |
| V29 |
( -- value ) |
| V3 |
( -- value ) |
| V30 |
( -- value ) |
| V31 |
( -- value ) |
| V4 |
( -- value ) |
| V5 |
( -- value ) |
| V6 |
( -- value ) |
| V7 |
( -- value ) |
| V8 |
( -- value ) |
| V9 |
( -- value ) |
| VC |
( -- value ) |
| VM |
( -- value ) |
| VS |
( -- value ) |
| W |
( Wn -- n ) |
| W/SP |
( Wn -- n ) |
| W/ZR |
( Wn -- n ) |
| X |
( Xn -- n ) |
| X/SP |
( Xn -- n ) |
| X/ZR |
( Xn -- n ) |
| X0 |
( -- value ) |
| X1 |
( -- value ) |
| X10 |
( -- value ) |
| X11 |
( -- value ) |
| X12 |
( -- value ) |
| X13 |
( -- value ) |
| X14 |
( -- value ) |
| X15 |
( -- value ) |
| X16 |
( -- value ) |
| X17 |
( -- value ) |
| X18 |
( -- value ) |
| X19 |
( -- value ) |
| X2 |
( -- value ) |
| X20 |
( -- value ) |
| X21 |
( -- value ) |
| X22 |
( -- value ) |
| X23 |
( -- value ) |
| X24 |
( -- value ) |
| X25 |
( -- value ) |
| X26 |
( -- value ) |
| X27 |
( -- value ) |
| X28 |
( -- value ) |
| X29 |
( -- value ) |
| X3 |
( -- value ) |
| X30 |
( -- value ) |
| X4 |
( -- value ) |
| X5 |
( -- value ) |
| X6 |
( -- value ) |
| X7 |
( -- value ) |
| X8 |
( -- value ) |
| X9 |
( -- value ) |
| XR |
( -- value ) |
| XZR |
( -- value ) |
| [] |
( Xn -- address ) |
| [post] |
( Xn imm -- offset ) |
| [pre] |
( Xn imm -- offset ) |
| add/sub-extended-register |
( Rd Rn operand op -- ) |
| add/sub-imm |
( Rd Rn imm opc -- ) |
| add/sub-register |
( Rd Rn Rm -- Rd Rn operand ) |
| add/sub-shifted-register |
( Rd Rn operand op -- ) |
| arg1 |
( -- value ) |
| arg2 |
( -- value ) |
| arg3 |
( -- value ) |
| arg4 |
( -- value ) |
| arg5 |
( -- value ) |
| arg6 |
( -- value ) |
| arg7 |
( -- value ) |
| arg8 |
( -- value ) |
| bit-pairs |
( element-bits -- pairs ) |
| bitfield |
( Rd Rn immr imms opc -- ) |
| bits-all-equal? |
( imm imm-width -- ? ) |
| cache |
( -- value ) |
| check-32-bit |
( reg -- reg ) |
| check-64-bit |
( reg -- reg ) |
| check-Wm |
( Wm uimm3 -- Wm uimm3 ) |
| check-Xm |
( Xm uimm3 -- Wm uimm3 ) |
| check-fp-register |
( reg -- reg ) |
| check-general-register |
( reg -- reg ) |
| check-registers |
( n quot -- quot: ( ... -- ... w ) ) |
| check-signed-immediate |
( n bits -- n ) |
| check-stack-register |
( reg -- reg ) |
| check-unsigned-immediate |
( n bits -- n ) |
| check-vector-register |
( reg -- reg ) |
| check-zero-register |
( reg -- reg ) |
| compare-and-branch |
( Rt imm19 op -- ) |
| conditional-branch |
( imm19 cond op -- ) |
| conditional-select |
( Rd Rn Rm cond op op2 -- ) |
| data-processing-1-source |
( Rd Rn opcode -- ) |
| data-processing-2-sources |
( Rd Rn Rm opcode -- ) |
| data-processing-3-sources |
( Rd Rn Rm Ra op -- ) |
| data-processing-3-sources* |
( Xd Xn Xm op -- ) |
| ds-0 |
( -- value ) |
| ds-1 |
( -- value ) |
| ds-2 |
( -- value ) |
| ds-3 |
( -- value ) |
| element-error |
( element element-width transitions -- * ) |
| encode-c-type |
( c-type L -- size VR opc1 sh L ) |
| exception |
( imm16 opc op2 LL -- ) |
| fp-compare |
( Rn Rm opcode -- ) |
| fp-data-processing-1-source |
( Rd Rn ftype opc op -- ) |
| fp-data-processing-2-sources |
( Rd Rn Rm opcode -- ) |
| fp-prefix |
( reg -- str ) |
| fp-temp |
( -- value ) |
| general-prefix |
( reg -- str ) |
| hint |
( CRm op2 -- ) |
| immediate-error |
( n -- * ) |
| immediate-width-error |
( n bits -- * ) |
| immr |
( pairs -- immr ) |
| insert-zero-register |
( Rn operand -- ZR Rn operand ) |
| insert-zero-register* |
( Rd operand -- Rd ZR operand ) |
| insns |
( n -- n ) |
| load-register-literal |
( Rt imm19 opc VR -- ) |
| load/store-pair |
( Rt Rt2 offset L -- ) |
| load/store-register |
( Rt operand L -- ) |
| load/store-register* |
( Rt operand c-type L -- ) |
| load/store-register-register |
( Rt operand L -- ) |
| load/store-register-register* |
( Rt operand c-type L -- ) |
| load/store-register-unsigned-offset |
( Rt size VR opc1 Rn offset L -- ) |
| logical-imm |
( Rd Rn imm opc -- ) |
| logical-immediate-error |
( imm imm-width -- * ) |
| logical-shifted-register |
( Rd Rn operand opc N -- ) |
| make-bits* |
( imm imm-width -- imm-bits ) |
| move-wide-imm |
( Rd imm16 hw opc -- ) |
| obj |
( -- value ) |
| quotient |
( -- value ) |
| register-mismatch |
( Rt Rt2 -- * ) |
| register-type-error |
( reg -- * ) |
| register-width-error |
( reg -- * ) |
| register-width-mismatch |
( registers -- * ) |
| remainder |
( -- value ) |
| repeating-element |
( imm-bits imm-width -- element-bits element-width ) |
| repeating-element? |
( imm-bits imm-width -- ? ) |
| scaling-error |
( n shift -- * ) |
| simd-2-misc |
( Rd Rn size0 U size1 opcode Q -- ) |
| simd-3-ext |
( Rd Rn Rm size U opcode -- ) |
| simd-3-same |
( Rd Rn Rm size0 U size1 opcode -- ) |
| simd-across-lanes |
( Rd Rn size U opcode -- ) |
| simd-copy |
( Rd Rn imm5 imm4 op -- ) |
| simd-copy* |
( Rd Rn imm5 rep imm4 op -- ) |
| simd-extract |
( Rd Rn Rm imm4 op2 -- ) |
| simd-permute |
( Rd Rn Rm size opcode -- ) |
| simd-scalar-2-misc |
( Rd Rn size0 U size1 opcode -- ) |
| simd-shift-by-imm |
( Rd Rn imm rep U opcode Q -- ) |
| simd-table-lookup |
( Rd Rn Rm op2 len op -- ) |
| split-ADR-immediate |
( imm -- immlo immhi ) |
| system-register-move |
( Rt o0:op1:CRn:CRm:op2 L -- ) |
| temp |
( -- value ) |
| temp1 |
( -- value ) |
| temp2 |
( -- value ) |
| test-and-branch |
( Rt imm6 imm14 op -- ) |
| transitions |
( pairs -- n ) |
| type |
( -- value ) |
| unconditional-branch-imm |
( imm26 op -- ) |
| unconditional-branch-reg |
( Rn opc -- ) |
| unknown-c-type |
( c-type -- * ) |
| unsigned-immediate? |
( n bits -- ? ) |
Class predicate words
| Word | Stack effect |
|---|---|
| add/sub-immediate? |
( object -- ? ) |
| element-error? |
( object -- ? ) |
| extended-register? |
( object -- ? ) |
| fp-register? |
( object -- ? ) |
| general-register? |
( object -- ? ) |
| immediate-error? |
( object -- ? ) |
| immediate-width-error? |
( object -- ? ) |
| logical-32-bit-immediate? |
( object -- ? ) |
| logical-64-bit-immediate? |
( object -- ? ) |
| logical-immediate-error? |
( object -- ? ) |
| logical-immediate? |
( object -- ? ) |
| offset? |
( object -- ? ) |
| operand? |
( object -- ? ) |
| register-mismatch? |
( object -- ? ) |
| register-number? |
( object -- ? ) |
| register-offset? |
( object -- ? ) |
| register-type-error? |
( object -- ? ) |
| register-width-error? |
( object -- ? ) |
| register-width-mismatch? |
( object -- ? ) |
| register-width? |
( object -- ? ) |
| register? |
( object -- ? ) |
| scaling-error? |
( object -- ? ) |
| shifted-add/sub-immediate? |
( object -- ? ) |
| shifted-register? |
( object -- ? ) |
| stack-register? |
( object -- ? ) |
| unknown-c-type? |
( object -- ? ) |
| unshifted-add/sub-immediate? |
( object -- ? ) |
| vector-register? |
( object -- ? ) |
| zero-register? |
( object -- ? ) |
Files
resource:basis/cpu/arm/64/assembler/assembler.factor
resource:basis/cpu/arm/64/assembler/assembler-tests.factor
Metadata files