cpu.x86.assembler.private vocabulary - Factor Documentation (original) (raw)
Summary
Metadata
Words
Union classes
Generic words
| Word | Stack effect |
|---|---|
 (MOV-I) |
( dst src -- ) |
| JUMPcc |
( addr opcode -- ) |
| displacement, |
( op -- ) |
| fits-in-byte? |
( value -- ? ) |
| modifier |
( op -- n ) |
| n, |
( value n -- ) |
| r/m |
( operand -- n ) |
| sib-present? |
( op -- ? ) |
Ordinary words
| Word | Stack effect |
|---|---|
 (2-operand) |
( reg operand op -- ) |
| (PEXTRW-sse1) |
( dest src imm -- ) |
| (PEXTRW-sse4) |
( dest src imm -- ) |
| (PSLLD-imm) |
( dest imm -- ) |
| (PSLLD-reg) |
( dest src -- ) |
| (PSLLQ-imm) |
( dest imm -- ) |
| (PSLLQ-reg) |
( dest src -- ) |
| (PSLLW-imm) |
( dest imm -- ) |
| (PSLLW-reg) |
( dest src -- ) |
| (PSRAD-imm) |
( dest imm -- ) |
| (PSRAD-reg) |
( dest src -- ) |
| (PSRAW-imm) |
( dest imm -- ) |
| (PSRAW-reg) |
( dest src -- ) |
| (PSRLD-imm) |
( dest imm -- ) |
| (PSRLD-reg) |
( dest src -- ) |
| (PSRLQ-imm) |
( dest imm -- ) |
| (PSRLQ-reg) |
( dest src -- ) |
| (PSRLW-imm) |
( dest imm -- ) |
| (PSRLW-reg) |
( dest src -- ) |
| (SHIFT) |
( dst src op -- ) |
| (x87-op) |
( operand opcode reg -- ) |
| 1, |
( n -- ) |
| 1-operand |
( operand reg,rex.w,opcode -- ) |
| 16-prefix |
( reg -- ) |
| 2, |
( n -- ) |
| 2-operand |
( dst src op -- ) |
| 2-operand-int/sse |
( dst src op1 op2 -- ) |
| 2-operand-mr-sse |
( dst src op1 op2 -- ) |
| 2-operand-rm-mr-sse |
( dst src op1{rm,mr} op2 -- ) |
| 2-operand-rm-mr-sse* |
( dst src op12{rm,mr} -- ) |
| 2-operand-rm-sse |
( dst src op1 op2 -- ) |
| 2-operand-sse |
( dst src op1 op2 -- ) |
| 2-operand-sse-cmp |
( dst src cmp op1 op2 -- ) |
| 2-operand-sse-shift |
( dst imm reg op1 op2 -- ) |
| 2shuffler |
( indexes/mask -- mask ) |
| 3-operand-mr-sse |
( dst src imm op1 op2 -- ) |
| 3-operand-rm-mr-sse |
( dst src imm op1 op2 -- ) |
| 3-operand-rm-sse |
( dst src imm op1 op2 -- ) |
| 4, |
( n -- ) |
| 4shuffler |
( indexes/mask -- mask ) |
| SETcc |
( dst opcode -- ) |
| addressing |
( reg operand -- ) |
| cell, |
( n -- ) |
| direction-bit |
( dst src op -- reg operand op' ) |
| direction-bit-sse |
( dst src op1 -- dst' src' op1' ) |
| direction-op-sse |
( dst src op1s -- dst' src' op1' ) |
| extended-opcode |
( opcode -- opcode' ) |
| extended-opcode, |
( opcode -- ) |
| immediate-1 |
( dst imm reg,rex.w,opcode -- ) |
| immediate-1* |
( dst imm reg,rex.w,opcode -- ) |
| immediate-1/4 |
( dst imm reg,rex.w,opcode -- ) |
| immediate-4 |
( dst imm reg,rex.w,opcode -- ) |
| immediate-fits-in-size-bit |
( dst imm reg,rex.w,opcode -- imm dst reg,rex.w,opcode ) |
| immediate-operand-size-bit |
( dst imm reg,rex.w,opcode -- imm dst reg,rex.w,opcode ) |
| indirect-base* |
( op -- n ) |
| indirect-index* |
( op -- n ) |
| indirect-scale* |
( op -- n ) |
| maybe-zero-extend |
( reg imm -- reg' imm ) |
| mod-r/m, |
( reg operand -- ) |
| no-prefix? |
( prefix reg r/m -- ? ) |
| opcode, |
( opcode -- ) |
| opcode-or |
( opcode mask -- opcode' ) |
| operand-size-bit |
( reg operand op -- reg operand op' ) |
| prefix-1 |
( reg rex.w -- ) |
| reg-code |
( reg -- n ) |
| rex-prefix |
( reg r/m rex.w -- ) |
| rex.b |
( m op -- n ) |
| rex.r |
( m op -- n ) |
| rex.w? |
( rex.w reg r/m -- ? ) |
| short-operand |
( reg rex.w n -- ) |
| sib, |
( operand -- ) |
| x87-m-st0/n-op |
( dst src opcode reg -- ) |
| x87-st0-op |
( src opcode reg -- ) |
| zero-extendable? |
( imm -- ? ) |
Class predicate words
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