[LLVMdev] Adding masked vector load and store intrinsics (original) (raw)

Demikhovsky, Elena elena.demikhovsky at intel.com
Sat Oct 25 04:40:03 PDT 2014

Thank you Hal,

meanwhile, I implemented something quick to be sure that it works and estimate what pieces of LLVM code should be touched. I'll prepare a patch soon.

-----Original Message----- From: Hal Finkel [mailto:hfinkel at anl.gov] Sent: Saturday, October 25, 2014 00:02 To: Demikhovsky, Elena Cc: dag at cray.com; llvmdev at cs.uiuc.edu Subject: Re: [LLVMdev] Adding masked vector load and store intrinsics

Elena,

As far as I can tell, consensus is strongly in favor. Please submit a patch :-)

Thanks again, Hal

----- Original Message ----- > From: "Elena Demikhovsky" <elena.demikhovsky at intel.com> > To: llvmdev at cs.uiuc.edu > Cc: dag at cray.com > Sent: Friday, October 24, 2014 6:24:15 AM > Subject: [LLVMdev] Adding masked vector load and store intrinsics >>>> Hi, >> We would like to add support for masked vector loads and stores by > introducing new target-independent intrinsics. The loop vectorizer > will then be enhanced to optimize loops containing conditional memory > accesses by generating these intrinsics for existing targets such as > AVX2 and AVX-512. The vectorizer will first ask the target about > availability of masked vector loads and stores. The SLP vectorizer can > potentially be enhanced to use these intrinsics as well. >> The intrinsics would be legal for all targets; targets that do not > support masked vector loads or stores will scalarize them. > The addressed memory will not be touched for masked-off lanes. In > particular, if all lanes are masked off no address will be accessed. >> call void @llvm.masked.store (i32* %addr, <16 x i32> %data, i32 4, > <16 x i1> %mask) >> %data = call <8 x i32> @llvm.masked.load (i32* %addr, <8 x i32> > %passthru, i32 4, <8 x i1> %mask) >> where %passthru is used to fill the elements of %data that are > masked-off (if any; can be zeroinitializer or undef). >> Comments so far, before we dive into more details? >> Thank you. >> - Elena and Ayal >>>> --------------------------------------------------------------------- > Intel Israel (74) Limited >> This e-mail and any attachments may contain confidential material for > the sole use of the intended recipient(s). Any review or distribution > by others is strictly prohibited. If you are not the intended > recipient, please contact the sender and delete all copies. > _________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >

Hal Finkel Assistant Computational Scientist Leadership Computing Facility Argonne National Laboratory

Intel Israel (74) Limited

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