[llvm-dev] Is there a way to correlate operation to machine instruction? (original) (raw)
Ryan Taylor via llvm-dev llvm-dev at lists.llvm.org
Fri Apr 14 07:46:53 PDT 2017
- Previous message: [llvm-dev] Is there a way to correlate operation to machine instruction?
- Next message: [llvm-dev] Constant folding some canonicalize intrinsics
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]
Is it possible to insert duplicate SDNodes prior to ISel (preferably during and directly before selection) that won't be CSE'd out?
Thanks.
On Wed, Apr 12, 2017 at 2:24 PM, Matt Arsenault <Matthew.Arsenault at amd.com> wrote:
On 04/12/2017 11:07 AM, Ryan Taylor wrote:
Matt,
so in AMDGPU, the operands are sort of 'generic'? Can you point me to the right places? Thanks. Not exactly generic, but they have custom defined constraints. Look at the definitions for the VSrc* operand types in SIRegisterIno.td. These set the OperandType on the Operand to a custom enum, and the target verifyInstruction checks the custom constraints. -Matt -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170414/7a9db398/attachment.html>
- Previous message: [llvm-dev] Is there a way to correlate operation to machine instruction?
- Next message: [llvm-dev] Constant folding some canonicalize intrinsics
- Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]