[llvm-dev] About TableGen RangeList (original) (raw)

陳韋任 via llvm-dev llvm-dev at lists.llvm.org
Mon Apr 17 06:27:31 PDT 2017

Hi Matt,

I believe bit isLittleEndianEncoding is irrelevant here. Tim and I are talking about if the (a) and (b) below getting the same (expected) result.

bits<32> insnEncoding;
let insnEncoding{15-12} = 0b0100; // (a)
let insnEncoding{15-12} = 0b0100; // (b)

Looking at TGParser::ParseRangePiece [1], no one use isLittleEndianEncoding. I think Tim's concern is it's quite easy to misuse those {15-12} and {12-15}, and users won't be notified if thing doesn't go as they expected.

[1] http://llvm.org/doxygen/TGParser_8cpp_source.html

Regards, chenwj

2017-04-17 1:16 GMT+08:00 Matt Arsenault <arsenm2 at gmail.com>:

> On Apr 15, 2017, at 20:35, Tim Northover via llvm-dev <_ _llvm-dev at lists.llvm.org> wrote: > > On 15 April 2017 at 19:52, 陳韋任 via llvm-dev <llvm-dev at lists.llvm.org> wrote: >> Okay, a little experiment shows the order matters. > > Interesting, thanks for reporting back. Personally I find it pretty > scary that we support the second form at all. It's mixing two > different endiannesses with no real indication of which one will win. > > Tim. _> ________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev I recall seeing an option to control this in InstrInfo: // Target can specify its instructions in either big or little-endian formats. // For instance, while both Sparc and PowerPC are big-endian platforms, the // Sparc manual specifies its instructions in the format [31..0] (big), while // PowerPC specifies them using the format [0..31] (little). bit isLittleEndianEncoding = 0;

-- Wei-Ren Chen (陳韋任) Homepage: https://people.cs.nctu.edu.tw/~chenwj -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170417/39c0dc5c/attachment.html>

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