[llvm-dev] Is subclass of ScheduleDAGMILive a pre-RA scheduler? (original) (raw)

Matthias Braun via llvm-dev llvm-dev at lists.llvm.org
Tue Apr 25 11:08:09 PDT 2017

On Apr 25, 2017, at 4:37 AM, 陳韋任 <chenwj.cs97g at g2.nctu.edu.tw> wrote:

Hi, Matthias. From the class hierarchy, ScheduleDAGMILive is also a ScheduleDAGMI. I am wondering if there will be any problem if we use subclass of ScheduleDAGMILive as post-RA scheduler? The best case is ScheduleDAGMILive just waste time on book-keeping register pressure, but I am not sure if we can still do those book-keeping after RA. Not sure why you want to use the variant with extra features that don't help you post-RA, but at least it shouldn't break.

Talk about post-RA scheduler, I see there is another class PostRASchedulerList whose DEBUGTYPE is post-RA-sched. I am wondering if that means we have two post-RA schedulers in LLVM right now? Any particular difference between those two classes, PostMachineScheduler and PostRASchedulerList? PostRASchedulerList is considered deprecated. If you are starting fresh use the PostMachineScheduler.

Thanks. Regards, chenwj 2017-04-25 10:46 GMT+08:00 Matthias Braun <mbraun at apple.com>:

On Apr 22, 2017, at 5:12 AM, 陳韋任 via llvm-dev <llvm-dev at lists.llvm.org> wrote:

Hi All, The description of ScheduleDAGMILive [1] says: ScheduleDAGMILive is an implementation of ScheduleDAGInstrs that schedules machine instructions while updating LiveIntervals and tracking regpressure. Does the live interval and register pressure part of ScheduleDAGMILive mean the subclass of ScheduleDAGMILive is a pre-RA scheduler? I assume the post-RA scheduler no need to take care of live interval and register pressure, since RA is done already. Yes ScheduleDAGMILive is used by the MachineScheduler which runs before register allocation. By default the MachineScheduler is put between register coalescing and the greedy register allocator. (There is also the PostMachineScheduler which as the name suggests runs after register allocation and that one only uses ScheduleDAGMI and does not track register pressure). - Matthias -- Wei-Ren Chen (陳韋任) Homepage: https://people.cs.nctu.edu.tw/~chenwj

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