[llvm-dev] Extending TableGen's 'foreach' to work with 'multiclass' and 'defm' (original) (raw)

Martin J. O'Riordan via llvm-dev llvm-dev at lists.llvm.org
Thu Aug 24 05:01:45 PDT 2017

Yes, this is very true. I am only recently in a company that can afford the cost of these tools :-) when I was in "start-up land" it was not accessible to me.

Do you know if the Synopsis tools is regularly tracking LLVM versions?

Thanks,

MartinO

-----Original Message----- From: Dr D. Chisnall [mailto:dc552 at hermes.cam.ac.uk] On Behalf Of David Chisnall Sent: 24 August 2017 11:23 To: Martin J. O'Riordan <MartinO at theheart.ie> Cc: Hal Finkel <hfinkel at anl.gov>; LLVM Developers <llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] Extending TableGen's 'foreach' to work with 'multiclass' and 'defm'

On 24 Aug 2017, at 11:20, Martin J. O'Riordan <MartinO at theheart.ie> wrote:

Seems simple enough, no? The object being to have a single definitive statement of the machine, and from that derive the RTL, silicon, documentation, assembler, compiler, debugger, simulator, etc. It’s a neat objective, but not well realised. There have been attempts in the past, but they always seem to fizzle out after a while, often because they begin as University PhD research topics, and after the original dissertation is completed, they just seem to die.

The Synopsis toolchain with their Lisa HDL can generate a TableGen back end for LLVM from the instruction descriptions.

David

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