[llvm-dev] Reaching definitions on Machine IR post register allocation (original) (raw)

Raghavan, Venugopal via llvm-dev llvm-dev at lists.llvm.org
Mon Sep 4 07:00:34 PDT 2017

Hi,

Just to clarify I am looking for a whole machine function analysis not just something restricted to within a machine basic block.

Thanks.

Regards, Venu.

From: Raghavan, Venugopal Sent: Saturday, September 02, 2017 12:56 PM To: llvm-dev at lists.llvm.org Subject: Reaching definitions on Machine IR post register allocation

Hi,

Given a definition of a register by a machine instruction in the Machine IR post register allocation, I would like to compute the set of uses of this register reached by this definition. Does LLVM already have this kind of analysis I can use? Otherwise, I will have to implement a reaching definitions analysis which would be a little involved since it would need to work on a non-SSA IR form.

If something already exists that would be very helpful for me.

Thanks.

Regards, Venugopal Raghavan. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170904/788a1c07/attachment.html>

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