[llvm-dev] Updating LLVM Tests for Patch (original) (raw)

Sanjay Patel via llvm-dev llvm-dev at lists.llvm.org
Wed Sep 20 07:09:58 PDT 2017

There are multiple problems/questions here:

  1. Make sure you've updated trunk to the latest rev before running update_llc_test_checks.py on lea-3.ll. Ie, I would only expect the output you're seeing if you're running the script on a version of that test file before r313631. After that commit, each RUN has its own check prefix, so there should be no conflict opportunity.

  2. I didn't realize the scope of the patch covered all targets and both scalars and vectors. That isn't going to work as-is. We can't assume that every target and data type will prefer to replace that multiply. Even the x86 diffs in lea-3.ll are regressions:

-; LNX1-NEXT: leal (%rdi,%rdi,2), %eax +; LNX1-NEXT: leal (,%rdi,4), %eax +; LNX1-NEXT: subl %edi, %eax

I suggest taking a smaller first step by limiting the patch to cases where the multiply is not a legal op for a target (TLI.isOperationLegal()).

  1. Since the patch can cause a crash, that needs to be investigated first. I didn't look into it, but my guess for the Hexagon crash (and probably other targets) is that you're trying to create illegal ops after the DAG has been legalized. So that's another potential way to limit the scope of the patch - don't try the transform unless we're pre-legalization: if (Level < AfterLegalizeDAG) { // do something }

On Wed, Sep 20, 2017 at 4:17 AM, Haidl, Michael < michael.haidl at uni-muenster.de> wrote:

Hi,

I am currently working on a more or less intrusive patch (D37896), which pulls optimizations on multiplications from some back-ends, e.g., (mul x, 2^N + 1) => (add (shl x, N), x) in AArch64, into the DAGCombiner to have this optimization generic on all targets. However, running the LLVM Tests leads to 67 unexpected results. Am 19.09.2017 um 15:58 schrieb Sanjay Patel: > For the tests that are changing, you should see if those changes are > improvements, regressions, or neutral. This is unfortunately not always > obvious for x86 asm, so feel free to just post those diffs in an updated > version of the patch at D37896. > > If the test files have auto-generated assertions (look for this string > on the first line of the test file: "NOTE: Assertions have been > autogenerated by utils/updatellctestchecks.py"... > and both of these do as of: https://reviews.llvm.org/rL313631 > <https://reviews.llvm.org/rL313631> ), then it's easy to observe the > diffs by re-running that script after your code patch is applied: > $ /path/to/updatellctestchecks.py --llc=/path/to/local/and/new/llc > lea-3.ll > $ svn diff lea-3.ll As described by Sanjay in the original thread, I updated the llc tests but some of the tests were not updated. For example: CodeGen/X86/lea-3.ll produces the following output: llvm/utils/updatellctestchecks.py --llc=/home/dev/local/bin/llc CodeGen/X86/lea-3.ll WARNING: Found conflicting asm under the same prefix: 'CHECK'! WARNING: Found conflicting asm under the same prefix: 'CHECK'! WARNING: Found conflicting asm under the same prefix: 'CHECK'! leaving parts of the test unchanged and the tests still fail. Other tests like CodeGen/AArch64/aarch64-gep-opt.ll results in: WARNING: Skipping non-FileChecked RUN line: llc -O3 -aarch64-enable-gep-opt=true -mattr=-use-aa -print-after=codegenprepare < %s >%t 2>&1 && FileCheck --check-prefix=CHECK-NoAA <%t %s_ _WARNING: Skipping non-FileChecked RUN line: llc -O3_ _-aarch64-enable-gep-opt=true -mattr=+use-aa -print-after=codegenprepare_ _< %s >%t 2>&1 && FileCheck --check-prefix=CHECK-UseAA <%t %s_ _WARNING: Skipping non-FileChecked RUN line: llc -O3_ _-aarch64-enable-gep-opt=true -print-after=codegenprepare -mcpu=cyclone <_ _%s >%t 2>&1 && FileCheck --check-prefix=CHECK-NoAA <%t %s_ _WARNING: Skipping non-FileChecked RUN line: llc -O3_ _-aarch64-enable-gep-opt=true -print-after=codegenprepare_ _-mcpu=cortex-a53 < %s >%t 2>&1 && FileCheck --check-prefix=CHECK-UseAA <%t %s_ _And the worst thing I witnessed was with the Hexagon back-end were my_ _changes in DAGCombiner trigger an Unreachable:_ _home/dev/llvm/build/./bin/llc -march=hexagon -mcpu=hexagonv5_ _-disable-hsdr <_ _/home/dev/llvm/llvm/test/CodeGen/Hexagon/vect/vect-cst-v4i32.ll |_ _/home/dev/llvm/build/./bin/FileCheck_ _/home/dev/llvm/llvm/test/CodeGen/Hexagon/vect/vect-cst-v4i32.ll_ _--_ _Exit Code: 2_ _Command Output (stderr):_ _--_ _ReplaceNodeResults not implemented for this target!_ _UNREACHABLE executed at_ _/home/dev/llvm/llvm/include/llvm/Target/TargetLowering.h:3164!_ _#0 0x00007f1b2d330cfa llvm::sys::PrintStackTrace(llvm::rawostream&)_ _(/home/dev/llvm/build/bin/../lib/libLLVMSupport.so.6+0x116cfa)_ _#1 0x00007f1b2d32ea9e llvm::sys::RunSignalHandlers()_ _(/home/dev/llvm/build/bin/../lib/libLLVMSupport.so.6+0x114a9e)_ _#2 0x00007f1b2d32ec04 SignalHandler(int)_ _(/home/dev/llvm/build/bin/../lib/libLLVMSupport.so.6+0x114c04)_ _#3 0x00007f1b2c3ed7f0 (/lib/x8664-linux-gnu/libc.so.6+0x357f0)_ _#4 0x00007f1b2c3ed77f gsignal (/lib/x8664-linux-gnu/libc.so.6+0x3577f)_ _#5 0x00007f1b2c3ef37a abort (/lib/x8664-linux-gnu/libc.so.6+0x3737a)_ _#6 0x00007f1b2d2b012a_ _(/home/dev/llvm/build/bin/../lib/libLLVMSupport.so.6+0x9612a)_ _#7 0x00007f1b359326ec_ _(/home/dev/llvm/build/bin/../lib/libLLVMHexagonCodeGen.so.6+0x1176ec)_ _#8 0x00007f1b2d6a37a6_ _llvm::DAGTypeLegalizer::CustomLowerNode(llvm::SDNode*, llvm::EVT, bool)_ _(/home/dev/llvm/build/bin/../lib/libLLVMSelectionDAG.so.6+0x1247a6)_ _#9 0x00007f1b2d6be0d9_ _llvm::DAGTypeLegalizer::SplitVectorResult(llvm::SDNode*, unsigned int)_ _(/home/dev/llvm/build/bin/../lib/libLLVMSelectionDAG.so.6+0x13f0d9)_ _#10 0x00007f1b2d69f156 llvm::DAGTypeLegalizer::run()_ _(/home/dev/llvm/build/bin/../lib/libLLVMSelectionDAG.so.6+0x120156)_ _#11 0x00007f1b2d6a01ff llvm::SelectionDAG::LegalizeTypes()_ _(/home/dev/llvm/build/bin/../lib/libLLVMSelectionDAG.so.6+0x1211ff)_ _#12 0x00007f1b2d785d42 llvm::SelectionDAGISel::CodeGenAndEmitDAG()_ _(/home/dev/llvm/build/bin/../lib/libLLVMSelectionDAG.so.6+0x206d42)_ _#13 0x00007f1b2d790fd8_ _llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function const&)_ _(/home/dev/llvm/build/bin/../lib/libLLVMSelectionDAG.so.6+0x211fd8)_ _#14 0x00007f1b2d7930e2_ _llvm::SelectionDAGISel::runOnMachineFunction(llvm::MachineFunction&)_ _[clone .part.873]_ _(/home/dev/llvm/build/bin/../lib/libLLVMSelectionDAG.so.6+0x2140e2)_ _#15 0x00007f1b35931d6a (anonymous_ _namespace)::HexagonDAGToDAGISel::runOnMachineFunction(llvm::_ _MachineFunction&)_ _(/home/dev/llvm/build/bin/../lib/libLLVMHexagonCodeGen.so.6+0x116d6a)_ _#16 0x00007f1b2ef22585_ _llvm::MachineFunctionPass::runOnFunction(llvm::Function&)_ _(/home/dev/llvm/build/bin/../lib/libLLVMCodeGen.so.6+0x21f585)_ _#17 0x00007f1b2e922dd3_ _llvm::FPPassManager::runOnFunction(llvm::Function&)_ _(/home/dev/llvm/build/bin/../lib/libLLVMCore.so.6+0x18ddd3)_ _#18 0x00007f1b2e922e93 llvm::FPPassManager::runOnModule(llvm::Module&)_ _(/home/dev/llvm/build/bin/../lib/libLLVMCore.so.6+0x18de93)_ _#19 0x00007f1b2e9239e1 llvm::legacy::PassManagerImpl::run(llvm::Module&)_ _(/home/dev/llvm/build/bin/../lib/libLLVMCore.so.6+0x18e9e1)_ _#20 0x000055b29c4ef3e2 compileModule(char**, llvm::LLVMContext&)_ _(/home/dev/llvm/build/./bin/llc+0x213e2)_ _#21 0x000055b29c4e23bc main (/home/dev/llvm/build/./bin/llc+0x143bc)_ _#22 0x00007f1b2c3d83f1 _libcstartmain_ _(/lib/x8664-linux-gnu/libc.so.6+0x203f1)_ _#23 0x000055b29c4e256a start (/home/dev/llvm/build/./bin/llc+0x1456a)_ _Stack dump:_ _0. Program arguments: /home/dev/llvm/build/./bin/llc -march=hexagon_ _-mcpu=hexagonv5 -disable-hsdr_ _1. Running pass 'Function Pass Manager' on module ''. 2. Running pass 'Hexagon DAG->DAG Pattern Instruction Selection' on function '@run' FileCheck error: '-' is empty. FileCheck command line: /home/dev/llvm/build/./bin/FileCheck /home/dev/llvm/llvm/test/CodeGen/Hexagon/vect/vect-cst-v4i32.ll How do I proceed to get the patch running all tests as expected? The Tests directly focused on the results of the patch are passing without problems. Cheers, Michael -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20170920/054182e9/attachment.html>

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