[llvm-dev] Store lowering -> Cannot select FrameIndex. (original) (raw)

Krzysztof Parzyszek via llvm-dev llvm-dev at lists.llvm.org
Wed Sep 20 08:25:19 PDT 2017

You cannot discard it, you need to provide some form of converting it into the address of the given stack slot: a selection pattern, custom selection, etc.

-Krzysztof

On 9/20/2017 10:14 AM, Dominique Torette via llvm-dev wrote: > Hi, >> I’m try to lower the store LLVM-IR instruction as per the following LLVM > IR program: >> *** IR Dump After Module Verifier *** >> define void @storeloadi32() { >> %ptr = alloca i32 >> store volatile i32 12, i32* %ptr >> ret void >> } >> The target instruction is associated to the store like this: >> _def       MOVSUTOAiSLr : CLPFPUAiSLr<0b1000001101,_ >> (ins > IMM32Operand:$ImmA, FPUaRegisterOperand:$RegB), >> (outs ), >> [], >> "movsutoa\t$ImmA,$RegB", >> [(store i32:$ImmA, i16:$RegB)],NoItinerary> { >> The selection DAG seems to be correct, but a FrameIndex of 0 as been > introduced : >> Optimized legalized selection DAG: BB#0 'storeloadi32:' >> SelectionDAG has 6 nodes: >> t0: ch = EntryToken >> t5: ch = store<Volatile ST4[%ptr]> t0, Constant:i32<12>, > FrameIndex:i16<0>, undef:i16 >> t6: ch = CLPISD::RETFLAG t5 >> _ISEL: Starting pattern match on root node: t5: ch = store ST4[%ptr]> t0, Constant:i32<12>, FrameIndex:i16<0>, undef:i16 >> The lowering correctly catches the store and morphs to right > MOVSUTOAiSLr MC instruction: >> Initial Opcode index to 331 >> Skipped scope entry (due to false predicate) at index 339, continuing > at 354 >> Morphed node: t5: ch = MOVSUTOAiSLr<Mem:Volatile ST4[%ptr]> > Constant:i32<12>, FrameIndex:i16<0>, t0 >> ISEL: Match complete! >> Then instruction selection try to lower the FrameIndex node !!! This failed… >> ISEL: Starting pattern match on root node: t2: i16 = FrameIndex<0> >> Initial Opcode index to 0 >> Match failed at index 0 >> LLVM ERROR: Cannot select: t2: i16 = FrameIndex<0> >> How to discard this FrameIndex<0> ? >>>>>> http://www.spacebel.be/wp-content/uploads/2011/06/image-sign-sbp.jpg >> Dominique Torette > System Architect > Rue des Chasseurs Ardennais - Liège Science Park - B-4031 Angleur > Tel: +32 (0) 4 361 81 11 - Fax: +32 (0) 4 361 81 20 > www.spacebel.be <http://www.spacebel.be/> >>> ------------------------------------------------------------------------------ >> E-MAIL DISCLAIMER >> The present message may contain confidential and/or legally privileged > information. If you are not the intended addressee and in case of a > transmission error, please notify the sender immediately and destroy > this E-mail. Disclosure, reproduction or distribution of this document > and its possible attachments is strictly forbidden. >> SPACEBEL denies all liability for incomplete, improper, inaccurate, > intercepted, (partly) destroyed, lost and/or belated transmission of the > current information given that unencrypted electronic transmission > cannot currently be guaranteed to be secure or error free. > Upon request or in conformity with formal, contractual agreements, an > originally signed hard copy will be sent to you to confirm the > information contained in this E-mail. >> SPACEBEL denies all liability where E-mail is used for private use. >> SPACEBEL cannot be held responsible for possible viruses that might > corrupt this message and/or your computer system. > ------------------------------------------------------------------------------- >>> _________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >

Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

More information about the llvm-dev mailing list