[llvm-dev] Question about instruction selection (original) (raw)

Josh Sharp via llvm-dev llvm-dev at lists.llvm.org
Fri Jan 18 18:03:19 PST 2019

Hi, I'm new to LLVM and trying to understand instruction selection. I compiled this llvm IR using llc with the '-debug' flag

define i32 @func() #0 { %a = alloca i32, align 4 %1 = load i32, i32* %a, align 4 ret i32 %1 }

The resulting assembly is

ADS -8 LDW r0,r0, r0,sp, 0 # 4-byte Folded Reload MOVR r0,r0, r0,r0 LDW r4,r4, r4,r0, 0 STSP $r0, 0 ADS 8 JLR

I'm trying to understand why r0 is being moved to itself. The debug output indicates this:

ISEL: Starting selection on root node: t1: i32 = FrameIndex<0> ISEL: Starting pattern match Morphed node: t1: i32 = MOVR t1 ISEL: Match complete!

In InstrInfo.td, MOVR has this dag pattern: [(set CPURegs:$ra, CPURegs:$rb)]. I don't understand how node t1's pattern matched MOVR's pattern.

Can someone point me to a location in the code where FrameIndex's pattern is defined?

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