RFR(L): 8081247 AVX 512 extended support code review request (original) (raw)
Berg, Michael C michael.c.berg at intel.com
Fri Jun 5 04:46:07 UTC 2015
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Vladimir please find the following webrev with the suggested changes, I have added small signature functions which look like the old versions in the assembler but manage the problem I need to handle, which is additional state for legacy only instructions. There is a new vm_version function which handles the cpuid checks with a conglomerate approach for the one scenario which had it. The loop in the stub generator is now formed to alter the upper bound and execute in one path.
http://cr.openjdk.java.net/~mcberg/8081247/webrev.03/
Regards, Michael
-----Original Message----- From: Vladimir Kozlov [mailto:vladimir.kozlov at oracle.com] Sent: Wednesday, June 03, 2015 6:10 PM To: Berg, Michael C; 'hotspot-compiler-dev at openjdk.java.net' Subject: Re: RFR(L): 8081247 AVX 512 extended support code review request
Hi, Michael
assembler_x86.cpp:
I don't like that you replaced prefix method with few parameters with method which has a lot of them:
- int encode = vex_prefix_0F38_and_encode_q(dst, src1, src2);
- int encode = vex_prefix_and_encode(dst->encoding(), src1->encoding(), src2->encoding(),
VEX_SIMD_NONE, VEX_OPCODE_0F_38,
true, AVX_128bit,
true, false);
Why you did that?
stubGenerator_x86_64.cpp:
Can we set different loop limit based on UseAVX instead of having 2 loops.
x86.ad:
Instead of long condition expressions like next:
UseAVX > 0 && !VM_Version::supports_avx512vl() && !VM_Version::supports_avx512bw()
May be have one VM_Version finction which does these checks.
Thanks, Vladimir
On 6/2/15 9:38 PM, Berg, Michael C wrote:
Hi Folks,
I would like to contribute more AVX512 enabling to facilitate support for machines which utilize EVEX encoding. I need two reviewers to review this patch and comment as needed: Bug-id: https://bugs.openjdk.java.net/browse/JDK-8081247 webrev: http://cr.openjdk.java.net/~mcberg/8081247/webrev.01/ This patch enables BMI code on EVEX targets, improves replication patterns to be more efficient on both EVEX enabled and legacy targets, adds more CPUID based rules for correct code generation on various EVEX enabled servers, extends more call save/restore functionality and extends the vector space further for SIMD operations. Please expedite this review as there is a near term need for the support. Also, as I am not yet a committer, this code needs a sponsor as well. Thanks, Michael
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