RFR: 8186461: Zero's atomic_copy64() should use SPE instructions on linux-powerpcspe (original) (raw)

John Paul Adrian Glaubitz glaubitz at physik.fu-berlin.de
Fri Nov 24 11:32:09 UTC 2017

Hello!

Zero's atomic_copy64() uses inline-assembly on PPC32 to implement an atomic load and store using FPU instructions.

While this works fine on most 32-bit PowerPC systems, there are some PPC systems, most notably PowerPC e500 [1] which don't come with an FPU but rather a special processing unit called "SPE" (not to be confused with the SPEs of the IBM Cell architecture).

Thus, the current implementation of atomic_copy64() will not build on PowerPC e500 systems. This issue was already discussed in 2010 but the proposed change was never merged [2]. While I think the 2010 approach was clever, I have decided to prefer the more explicit solution and not rely on the compiler generating the code we want, hence the use of evldd and evstdd. For reference of these instructions, see [3], page 184 and [4].

The changeset for review can be found in [5].

Thanks, Adrian

[1] https://en.wikipedia.org/wiki/PowerPCe500 [2] http://mail.openjdk.java.net/pipermail/jdk6-dev/2010-June/001870.html [3] https://www.nxp.com/docs/en/reference-manual/E500CORERM.pdf [4] https://shipilev.net/blog/2014/all-accesses-are-atomic/ [5] http://cr.openjdk.java.net/~glaubitz/8186461/webrev.01/

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