Intel FPGA and SoC Devices - MATLAB & Simulink (original) (raw)

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Generate and deploy HDL code and embedded software on Intel® FPGA and SoC Devices

HDL Coder™ can generate an IP core, integrate it into your Qsys project, and program the Intel hardware. Using Embedded Coder®, you can generate and build the embedded software, and run it on the ARM® processor. See Hardware-Software Co-Design Workflow for SoC Platforms.

To deploy your design to the Intel FPGA and SoC device, you must install the HDL Coder Support Package for Intel FPGA and SoC Devices. For installation information, see HDL Coder Supported Hardware.

HDL Coder Support Package for Intel FPGA and SoC Devices supports the generation of IP cores that can be integrated into FPGA designs using Intel Qsys. When used in combination with the Embedded Coder Support Package for Intel SoC Devices, this solution can program the Intel SoC using C and HDL code generation. The hardware-software co-design workflow spans simulation, prototyping, verification, and implementation.

Categories

• Setup and Configuration
  Download and install support package for use with third-party EDA tools and supported hardware
• Get Started With Hardware-Software Co-Design
  Deploy generated HDL code on a target hardware platform
• Generate an IP Core and Bitstream
  Generate HDL IP core and bitstream that contain HDL code for deployment on standalone Intel FPGA boards and SoC Devices

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