Rounding Function - Apply rounding function to signal - Simulink (original) (raw)
Main Content
Apply rounding function to signal
Libraries:
Simulink / Math Operations
Description
The Rounding Function block rounds each element of the input signal to produce the output signal.
You select the type of rounding from the Function parameter list. The name of the selected function appears on the block.
Tip
Use the Rounding Function block when you want vector or matrix output.
Ports
Input
Input signal to which the rounding function is applied.
Data Types: single | double
Output
Output signal after the rounding function is applied to the input signal. The output signal has the same dimensions and data type as the input. Each element of the output signal is the result of applying the selected rounding function to the corresponding element of the input signal.
Data Types: single | double
Parameters
Choose the rounding function applied to the input signal.
| Rounding function | Rounds each element of the input signal |
|---|---|
| floor | To the nearest integer value towards minus infinity |
| ceil | To the nearest integer towards positive infinity |
| round | To the nearest integer |
| fix | To the nearest integer towards zero |
Programmatic Use
| Block Parameter:Operator | ||
|---|---|---|
| Type: character vector | ||
| Values:'floor' | 'ceil' | 'round' | 'fix' |
| Default:'floor' |
Specify the time interval between samples. To inherit the sample time, set this parameter to -1. For more information, see Specify Sample Time.
Dependencies
This parameter is visible only if you set it to a value other than-1. To learn more, see Blocks for Which Sample Time Is Not Recommended.
Programmatic Use
To set the block parameter value programmatically, use the set_param function.
| Parameter: | SampleTime |
|---|---|
| Values: | "-1" (default) | scalar or vector in quotes |
Block Characteristics
| Data Types | double | single |
|---|---|
| Direct Feedthrough | yes |
| Multidimensional Signals | no |
| Variable-Size Signals | yes |
| Zero-Crossing Detection | no |
Extended Capabilities
HDL Coder™ provides additional configuration options that affect HDL implementation and synthesized logic.
HDL Architecture
This block has one default HDL architecture.
HDL Block Properties
| General | |
|---|---|
| ConstrainedOutputPipeline | Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is0. For more details, see ConstrainedOutputPipeline (HDL Coder). |
| InputPipeline | Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is0. For more details, see InputPipeline (HDL Coder). |
| OutputPipeline | Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is0. For more details, see OutputPipeline (HDL Coder). |
| Native Floating Point | |
|---|---|
| LatencyStrategy | Specify whether to map the blocks in your design to inherit,Max, Min, Zero, orCustom for the floating-point operator. The default isinherit. See also LatencyStrategy (HDL Coder). |
| NFPCustomLatency | To specify a value, setLatencyStrategy to Custom. HDL Coder adds latency equal to the value that you specify for theNFPCustomLatency setting. See also NFPCustomLatency (HDL Coder). |
Complex Data Support
This block supports code generation for complex signals.
Version History
Introduced before R2006a