High Level Language Support Instructions in Assembly Language (original) (raw)
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high level language support
summary
This web page examines high level language support instructions in assembly language. Specific examples of instructions from various processors are used to illustrate the general nature of assembly language.
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assembly/high level language interface
Because so many search requests are asking about how to interface between high level languages and assembly language, I have added this brief discussion.
Unfortunately, I can only provide you with some general guidelines rather than specific details. You will need to do further research on your own. If your high level compiler allows you to see an assembly language representation of its output, you should be able to figure out the details on your own.
Each processor has its own conventions on subroutine and function linkage. Each high level language also has its own conventions regarding subroutine and function linkage. Some operating systems add their own conventions to the mix. As these three sets of conventions are often at odds, you will need to do your own research to determine how any conflicts in conventions are resolved on your system (again, if your compiler produces an assembly language representation, you can use these listings and carefully crafted test code to determine your local rules).
C treats all subroutines as functions. Unless otherwise declared, each function returns an integer (which is usually the default size of a word on the processor). Parameters are passed by value by pushing the data onto the stack in right to left order (based on the function declaration). Objects less than four bytes (such as boolean, integer, and character) are sign-extended to four bytes. C arrays are passed by pointer. Sometimes C will break the rule and instead pass a pointer for a large data item (such as C arrays), so you may want to examine sample object code to see how various large data structures are handled. Depending on the processor, C function results are returned on the top of the stack (typically the space for the function return value is allocated on the stack after all of the parameters have been passed) or in a register (usually the default scratch register for that processor). The calling routine is responsible for removal of parameters.
Pascal has both subroutines and functions. For subroutines, there is no space allocated on the stack for a return value, while for functions the space for the return value is allocated on the stack after all of the parameters are passed. Parameters are pushed onto the stack in left to right order (based on the subroutine or function declaration). Parameters that are 32 bits or smaller are passed by value (the actual data is placed on the stack), while parameters that are greater than 32 bits are passed by reference (a pointer to the data is placed on the stack). Parameters of variable length are always passed by reference (a pointer) regardless of actual size (this applies in particular to pascal strings). If a data type is not an exact multiple of a byte (such as a bit string or set or certain kinds of ennumerated data), then the data element will be rounded up to the nearest byte, usually with zero padding in the high order bits (check your compiler output). Booleans are passed as a single byte (0 or 1), but boolean function results are returned as a pair of bytes with the boolean in the high byte. VARs are passed as four byte pointers. On some processors, data types that are not exact multiples of 16 or 32 bits are zero padded (high order bytes) to a 16 bit or 32 bit size (again, check your compiler output). The called routine is normally responsible for removal of parameters (other than a function return parameter).
high level language support
Many processors have instructions designed to support constructs common in high level languages. Ironically, a few high level language constructs have been based on specific hardware instructions on specific processors. One famous example is the computed GOTO (three possible branches based on whether the tested value is positive, zero, or negative), which is based on a hardware instruction in an early IBM processor (and if anyone can loan or give me a data book on the processor, I sure would appreciate it).
Most modern processors have some kind of loop instructions. These are some variation on the theme of testing for a condition and/or making a count with a short branch back to complete a loop if the exit condition fails.
Many modern processors have some kind of hardware support for temporary data storage (for the temporary variables used in subroutines and functions), combining special hardware instructions with argument and/or frame and/or stack pointers.
Bounds check instructions are used to check if an array reference is out of bounds.
- CMP2 Compare Register Against Bounds; Motorola 680x0, Motorola 68300; compares the contents of register (8, 16, or 32 bits) to a bounds pair (lower bound followed by upper bound), if both bounds are equal then this operation tests for a specific value; sets or clears flags
- BOUND Check Array Index Against Bounds; Intel 80x86; compares the contents of register (16 or 32 bits) to a bounds pair (lower bound followed by upper bound) in memory (source register contains address in memory of the first of two consecutive bounds), if the check fails, then an Interrupt 5 occurs; does not modify flags
- CHK Check Register Against Bounds; Motorola 680x0, Motorola 68300; compares a word (16-bits) or longword (32-bits) value in a data register to a lower bound of zero and a two’s complement upper bound specified in a data register or memory, a value of less than zero or greater than the upper bound results in a CHK instruction exception, vector number 6; sets or clears flags
- CHK2 Check Register Against Two Bounds; Motorola 680x0, Motorola 68300; compares a byte (8-bits), word (16-bits), or longword (32-bits) value in a data or address register to a bounds pair specified in memory, a value of less than the lower bound or greater than the upper bound results in a CHK instruction exception, vector number 6; sets or clears flags
- CASE Case; DEC VAX; the base operand is subtracted from the selector operand, creating an unsigned index, the index is compared to the limit operand and the case is skipped if it exceeds the limit, if within the limit then the index is used to compute the location into the displacement table and the displacement is used for an unconditional branch; and sets or clears flags; See DEC example
- DBcc Test Condition, Decrement, and Branch; Motorola 680x0, Motorola 68300; used to implement DO loops, WHILE loops, UNTIL loops, and similar constructs, starts by testing a designated condition, if the test is true then no additional action is taken and the program continues to the next instruction (exiting the loop), if the test is false then the designated data register is decremented, if the result is exactly -1 then the program continues to the next instruction (exiting the loop), otherwise the program makes a short (16 bit) branch to continue the loop: DBCC, DBCS, DBEQ, DBF, DBGE, DBGT, DBHI, DBLE, DBLS, DBLT, DBMI, DBNE, DBPL, DBT, DBVC, DBVS
- LOOP Loop While ECX Not Zero; Intel 80x86; used to implement DO loops, decrements the ECX or CX (count) register and then tests to see if it is zero, if the ECX or CX register is zero then the program continues to the next instruction (exiting the loop), otherwise the program makes a byte branch to contine the loop; does not modify flags
- LOOPE Loop While Equal; Intel 80x86; used to implement DO loops, WHILE loops, UNTIL loops, and similar constructs, decrements the ECX or CX (count) register and then tests to see if it is zero, if the ECX or CX register is zero or the Zero Flag is clear (zero) then the program continues to the next instruction (to exit the loop), otherwise the program makes a byte branch (to continue the loop); equivalent to LOOPZ; does not modify flags
- LOOPNE Loop While Not Equal; Intel 80x86; used to implement DO loops, WHILE loops, UNTIL loops, and similar constructs, decrements the ECX or CX (count) register and then tests to see if it is zero, if the ECX or CX register is zero or the Zero Flag is set (one) then the program continues to the next instruction (to exit the loop), otherwise the program makes a byte branch (to continue the loop); equivalent to LOOPNZ; does not modify flags
- LOOPNZ Loop While Not Zero; Intel 80x86; used to implement DO loops, WHILE loops, UNTIL loops, and similar constructs, decrements the ECX or CX (count) register and then tests to see if it is zero, if the ECX or CX register is zero or the Zero Flag is set (one) then the program continues to the next instruction (to exit the loop), otherwise the program makes a byte branch (to continue the loop); equivalent to LOOPNE; does not modify flags
- LOOPZ Loop While Zero; Intel 80x86; used to implement DO loops, WHILE loops, UNTIL loops, and similar constructs, decrements the ECX or CX (count) register and then tests to see if it is zero, if the ECX or CX register is zero or the Zero Flag is clear (zero) then the program continues to the next instruction (to exit the loop), otherwise the program makes a byte branch (to continue the loop); equivalent to LOOPE; does not modify flags
- JCXZ Jump if Count Register Zero; Intel 80x86; conditional jump if CX (count register) is zero; used to prevent entering loop if the count register starts at zero; does not modify flags
- JECXZ Jump if Extended Count Register Zero; Intel 80x86; conditional jump if ECX (count register) is zero; used to prevent entering loop if the count register starts at zero; does not modify flags
- LINK Link Stack; Motorola 680x0, Motorola 68300
- UNLK Unlink Stack; Motorola 680x0, Motorola 68300
- INSQHI Insert Entry into Queue at Head, Interlocked; DEC VAX; inserts a forward and backward linked entry into the head of a queue, checking first that all memory accesses can be performed without memory management exception, uses interlock to allow a queue to be shared by multiple prcoesses even in a multiprocessor environment without any additional synchronization
- INSQTI Insert Entry into Queue at Tail, Interlocked; DEC VAX; inserts a forward and backward linked entry into the tail of a queue, checking first that all memory accesses can be performed without memory management exception, uses interlock to allow a queue to be shared by multiple prcoesses even in a multiprocessor environment without any additional synchronization
- INSQUE Insert Entry in Queue; DEC VAX; inserts a forward and backward linked entry into the designated location in a queue, checking first that all memory accesses can be performed without memory management exception, non-interruptible so two or more processes on the same processor may share the same queue without conflict including queues shared with interrupt service routines
- REMQHI Remove Entry from Queue at Head, Interlocked; DEC VAX; removes a forward and backward linked entry from the head of a queue, checking first that all memory accesses can be performed without memory management exception, uses interlock to allow a queue to be shared by multiple prcoesses even in a multiprocessor environment without any additional synchronization
- INSQTI Remove Entry from Queue at Tail, Interlocked; DEC VAX; removes a forward and backward linked entry from the tail of a queue, checking first that all memory accesses can be performed without memory management exception, uses interlock to allow a queue to be shared by multiple prcoesses even in a multiprocessor environment without any additional synchronization
- INSQUE Remove Entry from Queue; DEC VAX; removes a forward and backward linked entry from the designated location in a queue, checking first that all memory accesses can be performed without memory management exception, non-interruptible so two or more processes on the same processor may share the same queue without conflict including queues shared with interrupt service routines
Digital Equipment Corporation’s “VAX Architecture Reference Manual” gives the following example of the CASE instruction using the VAX PASCAL compiler (quoted under the fair use doctrine):
case i of
32: x := sin(x);
33: x := cos(x);
34: x := exp(x);
35: x := ln(x);
36, 37: x := arctanh(x);
otherwise x := reserved
end
casel i, #32, <#37-32>
1$: .word sin - 1$ ; Selector is 32.
.word cos - 1$ ; Selector is 33.
.word exp - 1$ ; Selector is 34.
.word ln - 1$ ; Selector is 35.
.word arctanh - 1$ ; Selector is 36.
.word arctanh - 1$ ; Selector is 37.
otherwise:
movl reserved, x ; Selector is less than.
; 32 or greater than 37
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Created: February 21, 2001 (from machcode.htm)
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