Mohideen Kader | Anna University (original) (raw)
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First Asia Institute of Technology and Humanities
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Papers by Mohideen Kader
A CMOS single output two stage operational amplifier is presented here, which operates at 3 V pow... more A CMOS single output two stage operational amplifier is presented here, which operates at 3 V power supply at 0.18 micron (i.e., 180 nm) technology. It is designed to meet a set of provided specifications. The unique behavior of the MOS transistors in sub-threshold region not only allows a designer to work at low input bias current but also at low voltage. This op-amp has very low standby power consumption with a high driving capability and operates at low voltage so that the circuit operates at low power. The op-amp provides a gain of 20.4dB and a -3db bandwidth of 202 kHz and a unity gain bandwidth of 2.15MHz for a load of 5 pF capacitor. This op-amp has a PSRR (+) of 85.0 dB and a PSRR (-) of 60.0 dB. It has a CMRR (dc) of -64.4 dB, and an output slew rate of 12.465 v/µs. The power consumption for the op-amp is 1.18mW. The presented op-amp has an Input Common Mode Range(ICMR) of -1V to 2.4V. The op-amp is designed in the 180 nm technology using the umc 180 nm technology library. The layout for the above op-amp had been designed and the post layout simulations are compared with the schematic simulations.
A CMOS single output two stage operational amplifier is presented here, which operates at 3 V pow... more A CMOS single output two stage operational amplifier is presented here, which operates at 3 V power supply at 0.18 micron (i.e., 180 nm) technology. It is designed to meet a set of provided specifications. The unique behavior of the MOS transistors in sub-threshold region not only allows a designer to work at low input bias current but also at low voltage. This op-amp has very low standby power consumption with a high driving capability and operates at low voltage so that the circuit operates at low power. The op-amp provides a gain of 20.4dB and a -3db bandwidth of 202 kHz and a unity gain bandwidth of 2.15MHz for a load of 5 pF capacitor. This op-amp has a PSRR (+) of 85.0 dB and a PSRR (-) of 60.0 dB. It has a CMRR (dc) of -64.4 dB, and an output slew rate of 12.465 v/µs. The power consumption for the op-amp is 1.18mW. The presented op-amp has an Input Common Mode Range(ICMR) of -1V to 2.4V. The op-amp is designed in the 180 nm technology using the umc 180 nm technology library. The layout for the above op-amp had been designed and the post layout simulations are compared with the schematic simulations.