Loading... (original) (raw)

This issue proposes adding Zero support for the RISC-V architecture. Only 64 bit will be supported as there is no demand for 32 bit.

An initial patch is attached and I am currently testing this.

It is proposed that a project be set up to develop template interpreter, C1 and C2 support for riscv and I propose to file a JEP for this work but for the moment I work like to at least just get riscv supported so have filed this as a separate bug report.