IEEE Design & Test of Computers, Volume 3 (original) (raw)

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Volume 3, Number 1, February 1986

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    Rostam Joobbani, Daniel P. Siewiorek:
    WEAVER: A Knowledge-Based Routing Expert. 12-23
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    Walter S. Scott, John K. Ousterhout:
    Magic's Circuit Extractor. 24-34
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    Andrzej J. Strojwas:
    The CMU-CAM System. 35-44
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    Hingsum S. Fung, Sanford S. Hirschhorn:
    An Automatic DFT System for the Silc Silicon Compiler. 45-57
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    Anshul Kumar, Anjali Arya, V. V. Swaminathan, Amit Misra:
    Automatic Generation of Digital System Schematic Diagrams. 58-65
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    Louis K. Scheffer, Ronny Soetarman:
    Hierarchical Analysis of IC Artwork with User-Defined Rules. 66-74
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    C. Durward Rogers:
    The VIVID Symbolic Design System: Current Overview And Future Directions. 75-81
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    Conrad Zagwyn:
    New Products Test. 88-90
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    J. Daniel Nash:
    New Products Design. 91-92
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    Robert E. Anderson:
    Book Reviews. 95

Volume 3, Number 2, April 1986

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    Allen Dewey, Anthony Gadient:
    VHDL Motivation. 12-16
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    James H. Aylor, Ronald Waxman, Charles Scarratt:
    VHDL - Feature Description and Analysis. 17-27
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    Roger Lipsett, Erich Marschner, Moe Shahdad:
    VHDL - The Language. 28-41
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    Alfred S. Gilman:
    VHDL - The Designer Environment. 42-47
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    Al Lowenstein, Greg Winter:
    VHDL's Impact on Test. 48-53
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    J. Daniel Nash, Larry F. Saunders:
    VHDL Critique. 54-65
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    William R. Simpson, Carol J. Dowling:
    WRAPLE: The Weighted Repair Assistance Program Learning Extension. 66-73
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    J. Daniel Nash:
    New Products Design. 84
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    Conrad Zagwyn:
    New Products Test. 85

Volume 3, Number 3, June 1986

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    Dave W. Palmer, John A. Wisniewski:
    IC Design Capability Conversion from Mainframe to Workstation Environment. 18-24
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    Mark A. Linton:
    Benchmarking Engineering Workstations. 25-30
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    Rolf-Dieter Fiebrich:
    A Supercomputer Workstation for VLSI CAD. 31-37
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    Akira Sugimoto:
    VEGA: A Visual Modeling Language for Digital Systems. 38-45
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    K. L. Kodandapani, Edward J. McGrath:
    A Wirelist Compare Program for Verifying VLSI Layouts. 46-51
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    Dilip K. Bhavsar:
    A New Economical Implementation for Scannable Flip-Flops in MOS. 52-56
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    J. Daniel Nash:
    New Products Design. 65-67
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    Conrad Zagwyn:
    New Products Test. 68-69

Volume 3, Number 4, August 1986

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    Thirumalai Sridhar:
    A New Parallel Test Approach for Large Memories. 15-22
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    Teruo Tamama, Norio Kuji:
    Integrating an Electron-Beam System into VLSI Fault Diagnosis. 23-29
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    Dennis Petrich:
    Achieving Accurate Timing Measurements on TTL/CMOS Devices. 33-42
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    Miron Abramovici, James J. Kulikowski, Premachandran R. Menon, David T. Miller:
    SMART and FAST: Test Generation for VLSI Scan-Design Circuits. 43-54
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    Jerry M. Soden, Charles F. Hawkins:
    Test Considerations for Gate Oxide Shorts in CMOS ICs. 56-64
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    J. Daniel Nash:
    New Products Design. 72
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    Conrad Zagwyn:
    New Products Test. 73-75
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    Robert E. Anderson:
    Book Reviews. 76-77

Volume 3, Number 5, October 1986

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    Kenneth P. Parker:
    Testability: Barriers to Acceptance. 11-15
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    Madhukar K. Reddy, Sudhakar M. Reddy:
    Detecting FET Stuck-Open Faults in CMOS Latches and Flip-Flops. 17-26
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    Sunil K. Jain, Charles E. Stroud:
    Built-in Self Testing of Embedded Memories. 27-37
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    E. Ted Grinthal:
    Software Quality Assurance And CAD User Interfaces. 39-48
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    David Hightower, Aart J. de Geus, Patrick Fasang, Robert Griffin, Gary Leive:
    Computer-Aided-Design Research at the GE Microelectronics Center. 49-56

Volume 3, Number 6, December 1986

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    Hugo De Man, Jan M. Rabaey, Paul Six, Luc J. M. Claesen:
    Cathedral-II: A Silicon Compiler for Digital Signal Processing. 13-25
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    Frans P. M. Beenker, Karel J. E. van Eerdewijk, Robert B. W. Gerritsen, Frank N. Peacock, Max van der Star:
    Macro Testing: Unifying IC and Board Test. 26-32
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    Joachim Mucha, Wilfried Daehn, Josef Gross:
    Self-Test in a Standard Cell Environment. 35-41

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