dblp: IEEE Micro 1989 (original) (raw)

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IEEE Micro, Volume 9

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Volume 9, Number 1, February 1989

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    Richard H. Stern:
    MicroLaw-protecting hardware against competition by copyrighting it as a compilation of data. 2-5
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  Pierluigi Civera, Gianluca Piccinini, Maurizio Zamboni:
  Implementation studies for a VLSI Prolog coprocessor. 10-23
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  Hermann Kopetz, Andreas Damm, Christian Koza, Marco Mulazzani, Wolfgang Schwabl, Christoph Senft, Ralph Zainlinger:
  Distributed fault-tolerant real-time systems: the Mars approach. 25-40
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  Enrico Appiani, Bruno Conterno, Vildo Luperini, Leonardo Roncarolo:
  EMMA2: a high-performance hierarchical multiprocessor. 42-56
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  Beatrice Lazzerini:
  Effective VLSI processor architectures for HLL computers: the RISC approach. 57-65
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  Mansur R. Kabuka, Rodrigo Escoto:
  Real-time implementation of the Newton-Euler equations of motion on the NEC μPD77230 DSP. 66-76

Volume 9, Number 2, April 1989

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  Victor K. L. Huang, James W. Seery, William S. Wu, Saul Altabet, Michael J. Killian, Simeon Aymeloglu, Thaddeus J. Gabara, Aaron L. Fisher, Inseok Hwang, David W. Thompson:
  The AT&T WE32200 design challenge. 14-25
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  Charles Melear:
  The design of the 88000 RISC family. 26-38
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  Ioan Dancea:
  Dynamically changing the logical behavior of the microcomputer interface. 39-51
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  Mike P. Papazoglou:
  An extensible DBMS for small and medium systems. 52-68
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  Bernd Ingenbleek, Klaus Wölcken, Claudia Matthaus:
  Information flow in digital metal-oxide semiconductor circuits. 69-79

Volume 9, Number 3, June 1989

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  Ken Sakamura, Yoshiaki Kushiki, Kazuhiro Oda:
  An overview of the BTRON/286 specification. 14-25
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  Shumpei Kawasaki, Mitsuru Watabe, Shigeki Morinaga:
  A floating-point VLSI chip for the TRON architecture: an architecture for reliable numerical programming. 26-44
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  Shinji Komori, Kenji Shima, Souichi Miyata, Toshiya Okamoto, Hiroaki Terada:
  The data-driven microprocessor. 45-59
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  Jean-Daniel Nicoud, Andrew M. Tyrrell:
  The transputer T414 instruction set. 60-75
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  M. Mehdi Owrang O., W. Gamini Gunaratna:
  A logical design tool for relational databases. 76-83
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    Richard H. Stern:
    Appropriate and inappropriate legal protection of user interfaces and screen displays. I. 84-88

Volume 9, Number 4, August 1989

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    Richard H. Stern:
    MicroLaw-appropriate and inappropriate legal protection of user interfaces and screen displays. II. Technical aspects of screen design raising legal policy issues. 7-10
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  Leslie Kohn, Neal Margulis:
  Introducing the Intel i860 64-bit microprocessor. 15-30
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  Joe Jelemensky, Vernon Goler, Brad Burgess, James Eifert, Gary Miller, Leslie Kohn, Neal Margulis:
  The MC68332 microcontroller. 31-50
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  Richard S. Piepho, William S. Wu:
  A comparison of RISC architectures. 51-62
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  Matthew Johnson:
  A fixed-point DSP for graphics engines. 63-77

Volume 9, Number 5, October 1989

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    Richard H. Stern:
    Appropriate and inappropriate legal protection of user interfaces and screen displays. 3. Copyright law, the courts, and the copyright office. 8-9
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  N. Jagadish, J. Mohan Kumar, Lalit M. Patnaik:
  An efficient scheme for interprocessor communication using dual-ported RAMs. 10-19
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  Tho Le-Ngoc, Minh Tue Vo:
  Implementation and performance of the fast Hartley transform. 20-27
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  Walter J. Price:
  A benchmark tutorial. 28-43
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  An-Chi Liu, Ranjani Parthasarathi:
  Hardware monitoring of a multiprocessor system. 44-51
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  David F. Franklin, David V. Ostler:
  The P1073 medical information bus. 52-60
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  William P. Birmingham, Anurag P. Gupta, Daniel P. Siewiorek:
  The Micon system for computer design. 61-67
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  Mark R. Walker, Paul Hasler, Lex A. Akers:
  A CMOS neural network for pattern association. 68-74

Volume 9, Number 6, December 1989

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  Philip C. Treleaven, Marco Aurélio Cavalcanti Pacheco, Marley M. B. R. Vellasco:
  VLSI architectures for neural networks. 8-27
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  Karl Goser, Ulrich Hilleringmann, Ulrich Rückert, Klaus Schumacher:
  VLSI technologies for artificial neural networks. 28-44
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  Michel Verleysen, Paul G. A. Jespers:
  An analog VLSI implementation of Hopfield's neural network. 46-55
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  Olivier Rossetto, Christian Jutten, Jeanny Hérault, Ingo Kreuzer:
  Analog VLSI synaptic matrices as building blocks for neural networks. 56-63
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  Alan F. Murray:
  Pulse arithmetic in VLSI neural networks. 64-74
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  Eduardo R. Caianiello:
  Is there a silicon way to intelligence? 75-76

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