Logic Synthesis for Asynchronous Controllers and Interfaces (original) (raw)

Overview

Authors:

  1. J. Cortadella
    1. Department of Software, Universitat Politecnica de Catalunya, Barcelona, Spain
  2. M. Kishinevsky
    1. Intel Corporation, Hillsboro, USA
  3. A. Kondratyev
    1. Cadence Design Systems, Berkeley, USA
  4. L. Lavagno
    1. Dipartimento di Elettronica, Politecnico di Torino, Torino, Italy
  5. A. Yakovlev
    1. Department of Computing Science, University of Newcastle upon Tyne Claremont, Newcastle upon Tyne, UK

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About this book

This book is the result of a long friendship, of a broad international co­ operation, and of a bold dream. It is the summary of work carried out by the authors, and several other wonderful people, during more than 15 years, across 3 continents, in the course of countless meetings, workshops and discus­ sions. It shows that neither language nor distance can be an obstacle to close scientific cooperation, when there is unity of goals and true collaboration. When we started, we had very different approaches to handling the mys­ terious, almost magical world of asynchronous circuits. Some were more theo­ retical, some were closer to physical reality, some were driven mostly by design needs. In the end, we all shared the same belief that true Electronic Design Automation research must be solidly grounded in formal models, practically minded to avoid excessive complexity, and tested "in the field" in the form of experimental tools. The results are this book, and the CAD tool petrify. The latter can be downloaded and tried by anybody bold (or desperate) enough to tread into the clockless (but not lawless) domain of small-scale asynchronicity. The URL is http://www.lsi. upc. esr j ordic/petrify. We believe that asynchronous circuits are a wonderful object, that aban­ dons some of the almost militaristic law and order that governs synchronous circuits, to improve in terms of simplicity, energy efficiency and performance.

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Table of contents (10 chapters)

  1. Introduction

    • J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
      Pages 1-12
  2. Design Flow

    • J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
      Pages 13-27
  3. Background

    • J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
      Pages 29-59
  4. Logic Synthesis

    • J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
      Pages 61-86
  5. State Encoding

    • J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
      Pages 87-123
  6. Logic Decomposition

    • J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
      Pages 125-165
  7. Design Examples

    • J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
      Pages 209-244
  8. Other Work

    • J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
      Pages 245-254
  9. Conclusions

    • J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, A. Yakovlev
      Pages 255-255

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Authors and Affiliations

J. Cortadella

M. Kishinevsky

A. Kondratyev

L. Lavagno

A. Yakovlev

Bibliographic Information

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