Determining appropriate precisions for signals in fixed-point IIR filters | Proceedings of the 40th annual Design Automation Conference (original) (raw)
Published: 02 June 2003 Publication History
Abstract
This paper presents an analytical framework for the implementation of digital infinite impulse response filters in fixed-point hardware on field programmable gate arrays. This analysis is necessary because FPGAs, unlike fixed register size digital signal processors, allow custom bit widths. Within the framework, the designer determines the number of bits necessary for representing the constant coefficients and the internal signals in the filter. The coefficient bit widths are determined by accounting for the sensitivity of the filter's pole and zero locations with respect to the coefficient perturbations. The internal signal bit widths are determined by calculating theoretical bounds on the ranges of the signals, and on the errors introduced by truncation in the fixed-point hardware. The bounds tell how many bits are required at any point in the computation in order to avoid overflow and guarantee a prescribed degree of accuracy in the filter output. The bounds form the basis for a methodology for the fixed-point digital filter implementation. The methodology is applied to the implementation of a second-order filter used as a compensator in a magnetic bearing control system.
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DAC '03: Proceedings of the 40th annual Design Automation Conference
June 2003
1014 pages
Copyright © 2003 ACM.
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Publication History
Published: 02 June 2003
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Author Tags
- design methodology
- field programmable gate array
- finite word length effects
- infinite impulse response filter
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- Kabi BSahadevan APradhan T(2017)An overflow free fixed-point eigenvalue decomposition algorithm: Case study of dimensionality reduction in hyperspectral images2017 Conference on Design and Architectures for Signal and Image Processing (DASIP)10.1109/DASIP.2017.8122131(1-9)Online publication date: Sep-2017
- Monteiro FZimmermann TCleland-Huang JSu Z(2016)Bounded model checking of state-space digital systems: the impact of finite word-length effects on the implementation of fixed-point digital controllers based on state-space modelingProceedings of the 2016 24th ACM SIGSOFT International Symposium on Foundations of Software Engineering10.1145/2950290.2983979(1151-1153)Online publication date: 1-Nov-2016
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Joan Carletta
The University of Akron, Akron, OH
Robert Veillette
The University of Akron, Akron, OH
Frederick Krach
The University of Akron, Akron, OH
Zhengwei Fang
The University of Akron, Akron, OH