Sarah Ecil | Ecole Polytechnique de Tunisie (original) (raw)

Sarah Ecil

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Research paper thumbnail of A Hardware-Software Partitioning and Scheduling Algorithm for Dynamically Reconfigurable Embedded Systems

Dynamically reconfigurable embedded systems (DRESs) target an architecture consisting of generalp... more Dynamically reconfigurable embedded systems (DRESs) target an architecture consisting of generalpurpose processors and field programmable gate arrays (FPGAs), in which FPGAs can be reconfigured in run-time to achieve cost saving.

Research paper thumbnail of A Hardware-Software Partitioning and Scheduling Algorithm for Dynamically Reconfigurable Embedded Systems

Dynamically reconfigurable embedded systems (DRESs) target an architecture consisting of generalp... more Dynamically reconfigurable embedded systems (DRESs) target an architecture consisting of generalpurpose processors and field programmable gate arrays (FPGAs), in which FPGAs can be reconfigured in run-time to achieve cost saving.

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