[DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND) · llvm/llvm-project@25eb7b0 (original) (raw)

Original file line number	Diff line number	Diff line change
@@ -890,13 +890,18 @@ enum NodeType {
890	890	/// BRCOND - Conditional branch. The first operand is the chain, the
891	891	/// second is the condition, the third is the block to branch to if the
892	892	/// condition is true. If the type of the condition is not i1, then the
893		-/// high bits must conform to getBooleanContents.
	893	+/// high bits must conform to getBooleanContents. If the condition is undef,
	894	+/// it nondeterministically jumps to the block.
	895	+/// TODO: Its semantics w.r.t undef requires further discussion; we need to
	896	+/// make it sure that it is consistent with optimizations in MIR & the
	897	+/// meaning of IMPLICIT_DEF. See https://reviews.llvm.org/D92015
894	898	BRCOND,
895	899
896	900	/// BR_CC - Conditional branch. The behavior is like that of SELECT_CC, in
897	901	/// that the condition is represented as condition code, and two nodes to
898	902	/// compare, rather than as a combined SetCC node. The operands in order
899		-/// are chain, cc, lhs, rhs, block to branch to if condition is true.
	903	+/// are chain, cc, lhs, rhs, block to branch to if condition is true. If
	904	+/// condition is undef, it nondeterministically jumps to the block.
900	905	BR_CC,
901	906
902	907	/// INLINEASM - Represents an inline asm block. This node always has two