[RISCV] Handle scalarized reductions in getArithmeticReductionCost · llvm/llvm-project@425d1aa (original) (raw)

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Original file line number Diff line number Diff line change
@@ -1658,9 +1658,8 @@ RISCVTTIImpl::getArithmeticReductionCost(unsigned Opcode, VectorType *Ty,
1658 1658 break;
1659 1659 case ISD::FADD:
1660 1660 // We can't promote f16/bf16 fadd reductions.
1661 -if ((LT.second.getVectorElementType() == MVT::f16 &&
1662 - !ST->hasVInstructionsF16()) |
1663 - LT.second.getVectorElementType() == MVT::bf16)
1661 +if ((LT.second.getScalarType() == MVT::f16 && !ST->hasVInstructionsF16()) |
1662 + LT.second.getScalarType() == MVT::bf16)
1664 1663 return BaseT::getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
1665 1664 if (TTI::requiresOrderedReduction(FMF)) {
1666 1665 Opcodes.push_back(RISCV::VFMV_S_F);