llvm-project (original) (raw)

On aarch64, if one is building for a softfloat target (in Rust that's e.g. the target aarch64-unknown-none-softfloat, which in particular sets -neon,-fp-armv8 target features by default), there seems to be no way to build some code that does make use of the FPU while remaining ABI-compatible with the rest of the binary: to enable use of the FPU, we have to set +fp-armv8, but this will inevitably also change which registers are being used to pass float arguments around.

On other targets, one can have the target do something like set +soft-float, so even if someone now enables e.g. SSE features on x86 or fpregs on ARM, code will be built with the softfloat ABI and thus be compatible with this target. But aarch64 doesn't seem to have something like +soft-float, meaning it is impossible to disentangle the float ABI from whether FPU instructions can be used.

Is there a specific reason this is currently not possible on aarch64, or is it just that nobody implemented this yet? Or am I missing some other way to generate aarch64 code that uses the FPU but uses a softfloat ABI?