Rollup merge of #130549 - biabbas:riscv32_wrs_vxworks, r=nnethercote · qinheping/verify-rust-std@6a06555 (original) (raw)

Skip to content

Sign in

Appearance settings

View all features

View all solutions

Provide feedback

We read every piece of feedback, and take your input very seriously.

Include my email address so I can be contacted

Saved searches

Use saved searches to filter your results more quickly

Sign in

Sign up

Appearance settings

qinheping / verify-rust-std Public

forked from model-checking/verify-rust-std

Additional navigation options

Commit 6a06555

Browse files

matthiaskrgrmatthiaskrgr

authored

Rollup merge of rust-lang#130549 - biabbas:riscv32_wrs_vxworks, r=nnethercote

Add RISC-V vxworks targets Risc-V 32 and RISC-V 64 targets are to be added in the target list.

2 parents 2c408b1 + 557a0b8 commit 6a06555

File tree

1 file changed

1

-

0

lines changed

1 file changed

1

-

0

lines changed

‎std/src/sys/alloc/unix.rs‎

Lines changed: 1 addition & 0 deletions

Original file line number Diff line number Diff line change
@@ -71,6 +71,7 @@ cfg_if::cfg_if! {
71 71 }
72 72 } else {
73 73 #[inline]
74 + #[cfg_attr(target_os = "vxworks", allow(unused_unsafe))]
74 75 unsafe fn aligned_malloc(layout: &Layout) -> *mut u8 {
75 76 let mut out = ptr::null_mut();
76 77 // We prefer posix_memalign over aligned_alloc since it is more widely available, and

0 commit comments

Comments

(0)