Wrong layout generated for some structures with complex bit fields · Issue #1947 · rust-lang/rust-bindgen (original) (raw)

Input C/C++ Header

typedef unsigned char U8; typedef unsigned short U16;

typedef struct { U16 MADZ : 10, MAI0 : 2, MAI1 : 2, MAI2 : 2; U8 MADK, MABR; U16 MATH : 10, MATE : 4, MATW : 2; U8 MASW : 4, MABW : 3, MAXN : 1, rB; } V56AMDY;

Bindgen Invocation

bindgen::Builder::default() .header("input.h") .generate() .unwrap()

or

Actual Results

Bindings:

/* automatically generated by rust-bindgen 0.56.0 */ // ... pub type U8 = ::std::os::raw::c_uchar; pub type U16 = ::std::os::raw::c_ushort; #[repr(C)] #[repr(align(2))] #[derive(Debug, Default, Copy, Clone)] pub struct V56AMDY { pub _bitfield_1: __BindgenBitfieldUnit<[u8; 2usize], u16>, pub MADK: U8, pub MABR: U8, pub _bitfield_2: __BindgenBitfieldUnit<[u8; 4usize], u16>, pub rB: U8, } #[test] fn bindgen_test_layout_V56AMDY() { assert_eq!( ::std::mem::size_of::(), 8usize, concat!("Size of: ", stringify!(V56AMDY)) ); // ... } // ...

Layout Test:

test bindgen_test_layout_V56AMDY ... FAILED

failures:

---- bindgen_test_layout_V56AMDY stdout ----
thread 'bindgen_test_layout_V56AMDY' panicked at 'assertion failed: `(left == right)`
  left: `10`,
 right: `8`: Size of: V56AMDY', tests/struct_with_complex_bitfields.rs:109:5
note: run with `RUST_BACKTRACE=1` environment variable to display a backtrace

failures:
    bindgen_test_layout_V56AMDY

test result: FAILED. 0 passed; 1 failed; 0 ignored; 0 measured; 0 filtered out

Expected Results

Bindings:

/* automatically generated by rust-bindgen 0.56.0 */ // ... pub type U8 = ::std::os::raw::c_uchar; pub type U16 = ::std::os::raw::c_ushort; #[repr(C)] #[repr(align(2))] #[derive(Debug, Default, Copy, Clone)] pub struct V56AMDY { pub _bitfield_1: __BindgenBitfieldUnit<[u8; 2usize], u16>, pub MADK: U8, pub MABR: U8, pub _bitfield_2: __BindgenBitfieldUnit<[u8; 3usize], u16>, pub rB: U8, } #[test] fn bindgen_test_layout_V56AMDY() { assert_eq!( ::std::mem::size_of::(), 8usize, concat!("Size of: ", stringify!(V56AMDY)) ); // ... } // ...

Layout Test:

running 1 test
test bindgen_test_layout_V56AMDY ... ok

test result: ok. 1 passed; 0 failed; 0 ignored; 0 measured; 0 filtered out