Add f16 and f128 inline ASM support for x86 and x86-64 · rust-lang/rust@dfc5514 (original) (raw)
`@@ -959,6 +959,43 @@ fn llvm_fixup_input<'ll, 'tcx>(
`
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`InlineAsmRegClass::X86(X86InlineAsmRegClass::xmm_reg | X86InlineAsmRegClass::zmm_reg),
`
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`Abi::Vector { .. },
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`) if layout.size.bytes() == 64 => bx.bitcast(value, bx.cx.type_vector(bx.cx.type_f64(), 8)),
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(
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::xmm_reg
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| X86InlineAsmRegClass::ymm_reg
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| X86InlineAsmRegClass::zmm_reg,
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),
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Abi::Scalar(s),
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) if bx.sess().asm_arch == Some(InlineAsmArch::X86)
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&& s.primitive() == Primitive::Float(Float::F128) =>
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{
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bx.bitcast(value, bx.type_vector(bx.type_i32(), 4))
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}
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(
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::xmm_reg
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| X86InlineAsmRegClass::ymm_reg
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``
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| X86InlineAsmRegClass::zmm_reg,
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),
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Abi::Scalar(s),
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) if s.primitive() == Primitive::Float(Float::F16) => {
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let value = bx.insert_element(
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bx.const_undef(bx.type_vector(bx.type_f16(), 8)),
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value,
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bx.const_usize(0),
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);
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bx.bitcast(value, bx.type_vector(bx.type_i16(), 8))
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}
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(
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::xmm_reg
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``
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| X86InlineAsmRegClass::ymm_reg
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| X86InlineAsmRegClass::zmm_reg,
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),
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Abi::Vector { element, count: count @ (8 | 16) },
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) if element.primitive() == Primitive::Float(Float::F16) => {
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bx.bitcast(value, bx.type_vector(bx.type_i16(), count))
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``
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}
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`(
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`InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg | ArmInlineAsmRegClass::sreg_low16),
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`Abi::Scalar(s),
`
`@@ -1036,6 +1073,39 @@ fn llvm_fixup_output<'ll, 'tcx>(
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`InlineAsmRegClass::X86(X86InlineAsmRegClass::xmm_reg | X86InlineAsmRegClass::zmm_reg),
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`Abi::Vector { .. },
`
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`) if layout.size.bytes() == 64 => bx.bitcast(value, layout.llvm_type(bx.cx)),
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(
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::xmm_reg
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| X86InlineAsmRegClass::ymm_reg
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| X86InlineAsmRegClass::zmm_reg,
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),
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Abi::Scalar(s),
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) if bx.sess().asm_arch == Some(InlineAsmArch::X86)
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&& s.primitive() == Primitive::Float(Float::F128) =>
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{
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bx.bitcast(value, bx.type_f128())
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}
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(
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::xmm_reg
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| X86InlineAsmRegClass::ymm_reg
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| X86InlineAsmRegClass::zmm_reg,
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),
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Abi::Scalar(s),
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) if s.primitive() == Primitive::Float(Float::F16) => {
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let value = bx.bitcast(value, bx.type_vector(bx.type_f16(), 8));
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bx.extract_element(value, bx.const_usize(0))
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}
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(
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::xmm_reg
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| X86InlineAsmRegClass::ymm_reg
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| X86InlineAsmRegClass::zmm_reg,
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),
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Abi::Vector { element, count: count @ (8 | 16) },
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) if element.primitive() == Primitive::Float(Float::F16) => {
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bx.bitcast(value, bx.type_vector(bx.type_f16(), count))
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}
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`(
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`InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg | ArmInlineAsmRegClass::sreg_low16),
`
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`Abi::Scalar(s),
`
`@@ -1109,6 +1179,36 @@ fn llvm_fixup_output_type<'ll, 'tcx>(
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`InlineAsmRegClass::X86(X86InlineAsmRegClass::xmm_reg | X86InlineAsmRegClass::zmm_reg),
`
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`Abi::Vector { .. },
`
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`) if layout.size.bytes() == 64 => cx.type_vector(cx.type_f64(), 8),
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(
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::xmm_reg
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``
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| X86InlineAsmRegClass::ymm_reg
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``
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| X86InlineAsmRegClass::zmm_reg,
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),
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Abi::Scalar(s),
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) if cx.sess().asm_arch == Some(InlineAsmArch::X86)
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&& s.primitive() == Primitive::Float(Float::F128) =>
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{
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cx.type_vector(cx.type_i32(), 4)
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}
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(
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::xmm_reg
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``
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| X86InlineAsmRegClass::ymm_reg
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``
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| X86InlineAsmRegClass::zmm_reg,
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),
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Abi::Scalar(s),
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) if s.primitive() == Primitive::Float(Float::F16) => cx.type_vector(cx.type_i16(), 8),
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(
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InlineAsmRegClass::X86(
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X86InlineAsmRegClass::xmm_reg
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| X86InlineAsmRegClass::ymm_reg
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| X86InlineAsmRegClass::zmm_reg,
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),
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Abi::Vector { element, count: count @ (8 | 16) },
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) if element.primitive() == Primitive::Float(Float::F16) => {
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cx.type_vector(cx.type_i16(), count)
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}
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`(
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`InlineAsmRegClass::Arm(ArmInlineAsmRegClass::sreg | ArmInlineAsmRegClass::sreg_low16),
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`Abi::Scalar(s),
`