Add wasm32 support to inline asm by devsnek · Pull Request #78684 · rust-lang/rust (original) (raw)

Add asm register information for SPIR-V

As discussed in zulip, we at rust-gpu would like to support asm! for our SPIR-V backend. However, we cannot do so purely without frontend support: this match fails and so asm! is not supported (error reported here). To resolve this, we need to stub out register information for SPIR-V to support getting the asm! content all the way to AsmBuilderMethods::codegen_inline_asm, at which point the rust-gpu backend can do all the parsing and codegen that is needed.

This is a pretty weird PR - adding support for a backend that isn't in-tree feels pretty gross to me, but I don't see an easy way around this. @Amanieu said I should submit it anyway, so, here we are! Let me know if this needs to go through a more formal process (MCP?) and what I should do to help this along.

I based this off the wasm asm PR, which unfortunately this PR conflicts with that one quite a bit, sorry for any merge conflict pain :(

Some open questions:

• What do we call the register class? Some context, SPIR-V is an SSA-based IR, there are "instructions" that create IDs (referred to as <id> in the spec), which can be referenced by other instructions. So, reg isn't exactly accurate, they're SSA IDs, not re-assignable registers.
• What happens when a SPIR-V register gets to the LLVM backend? Right now it's a bug!, but should that be a sess.fatal()? I'm not sure if it's even possible to reach that point, maybe there's a check that prevents the spirv target from even reaching that codepath.