Amr Abdel-Hamid | The German University in Cairo (original) (raw)

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Papers by Amr Abdel-Hamid

Computer and Information Science, Jan 27, 2018

Journal of Electrical and Computer Engineering, 2016

The internet of thing (IoT) has become a widespread phenomenon that has resulted in an exponentia... more The internet of thing (IoT) has become a widespread phenomenon that has resulted in an exponential growth in data. The increase in the number of devices connected to the internet has raised a lot of security issues and privacy concerns. Users are susceptible to many forms of cyber-attacks; which could affect the functionality of their devices and their power signature. In this paper, we are proposing the usage of Hidden Markov Model (HMM) to model the power consumption patterns of IoT sensor nodes. Using such model, we were able to detect anomalies in the system's behavior and thus, identifying attacks and classifying them. Using the training data, a detection threshold is computed to differentiate between normal and anomalous behavior. A series of tests were performed on the algorithm using false data injection and the effect of varying HMM parameters is studied. Finally, alterations to the IoT sensor node's functionality are made to mimic the effect of an attack. The method was found to be successful in identifying attacks, trojans and malfunctions as well as, detecting the type of change that has occurred in the system's performance.

The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004., Dec 23, 2004

IEEE 802.15.4 Wireless Sensor Networks (WSNs) possess additional vulnerabilities in comparison wi... more IEEE 802.15.4 Wireless Sensor Networks (WSNs) possess additional vulnerabilities in comparison with traditional wired and wireless networks, such as broadcast nature of wireless medium, dynamic network topology, resource- constrained nodes, lack of physical safeguards in nodes, and immense network scale. These inherent vulnerabilities present opportunities for attackers to launch novel and more complicated attacks against such networks. For this reason, a thorough investigation of the attacks which can be launched against WSNs is required. This paper provides a single unified survey that dissects all IEEE 802.15.4 MAC layer attacks known to date. While the majority of existing references investigate the motive and behavior of each attack separately, this survey addresses the interrelationships and differences between the attacks following their classification. The survey defines two main classifications for the attacks by combining and refining existing classifications of the attacks obtained from external references. The defined classifications are further extended by including additional attacks, which have been left out by other references, within the classifications. The authors' opinions and comments regarding the placement of the attacks within the defined classifications are also provided. A comparative analysis between the classified attacks is then performed with respect to a set of evaluation criteria defined within the paper.

The increasing cost of IC fabrication and the ever-shrinking transistor size forces IC Industry t... more The increasing cost of IC fabrication and the ever-shrinking transistor size forces IC Industry to move its fabrication facilities to cheaper less reliable sources. This process creates the chance of inserting malicious manipulations namely Hardware Trojans at different phases of the design cycle. Trojans are a real challenge to IC industry especially in an era of smart cities and connected sensors. In this paper, we propose a behavioral fragile IP watermarking technique that embeds the signature in finite state machines (FSMs) transitions to ensure design integrity. The inserted fragile mark is extremely sensitive to any design alterations, which makes it an excellent and economical choice to detect design changes. Finally, we analyze and evaluate different aspects of the proposed technique, including sensitivity to design changes, robustness, as well as complexity and insertion overhead to design cycle.

Design, Automation, and Test in Europe, Apr 1, 2005

Hardware Trojans are intrusive actions that tend to corrupt the functional behavior of genuine de... more Hardware Trojans are intrusive actions that tend to corrupt the functional behavior of genuine designs, leak their sensitive information, or even downgrade their performance. This paper proposes a Computer-Aided Design (CAD) tool for Fragile Hierarchical FSM Watermarking to be employed as a novel presilicon Trojan detection technique at the RTL level. The performance of the proposed watermarking tool, regarding its complexity and insertion time overhead, is evaluated. Moreover, an intentional Trojan insertion scenario is executed in order to verify the sensitivity and reliability of the presented tool against the least changes in the original RTL design.

2011 AGILE Conference, 2011

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2011

2018 International Conference on Computer and Applications (ICCA)

The increasing cost of IC fabrication and the ever-shrinking transistor size forces IC Industry t... more The increasing cost of IC fabrication and the ever-shrinking transistor size forces IC Industry to move its fabrication facilities to cheaper less reliable sources. This process creates the chance of inserting malicious manipulations namely Hardware Trojans at different phases of the design cycle. Trojans are a real challenge to IC industry especially in an era of smart cities and connected sensors. In this paper, we propose a behavioral fragile IP watermarking technique that embeds the signature in finite state machines (FSMs) transitions to ensure design integrity. The inserted fragile mark is extremely sensitive to any design alterations, which makes it an excellent and economical choice to detect design changes. Finally, we analyze and evaluate different aspects of the proposed technique, including sensitivity to design changes, robustness, as well as complexity and insertion overhead to design cycle.

Abstract. The IEEE-754 floating-point standard is considered one of the most important standards,... more Abstract. The IEEE-754 floating-point standard is considered one of the most important standards, and is used in nearly all floating-point applications. In this paper, we have formalized and verified a hardware implementation of the Table-Driven algorithm for the floating-point exponential function. Throughout this paper, we have used a hierarchical approach in formally modeling and verifying in HOL the floating-point exponential function from the gate level implementation up to a behavioral specification written by Harrison [7]. 1

Deep datapath and algorithm complexity have made the verification of floating-point units a very ... more Deep datapath and algorithm complexity have made the verification of floating-point units a very hard task. Most simulation and reachability analysis verification tools fail to verify a circuit with a deep datapath like most industrial floating-point units. Theorem proving, however, offers a better solution to handle such verification. In this paper, we have hierarchically formalized and verified a hardware implementation of the IEEE-754 table-driven floating-point exponential function algorithm using the higher-order logic (HOL) theorem prover. The high ability of abstraction in the HOL verification system allows its use for the verification task over the whole design path of the circuit, starting from gate-level implementation of the circuit up to a high-level mathematical specification.

Computer and Information Science, Jan 27, 2018

Journal of Electrical and Computer Engineering, 2016

The internet of thing (IoT) has become a widespread phenomenon that has resulted in an exponentia... more The internet of thing (IoT) has become a widespread phenomenon that has resulted in an exponential growth in data. The increase in the number of devices connected to the internet has raised a lot of security issues and privacy concerns. Users are susceptible to many forms of cyber-attacks; which could affect the functionality of their devices and their power signature. In this paper, we are proposing the usage of Hidden Markov Model (HMM) to model the power consumption patterns of IoT sensor nodes. Using such model, we were able to detect anomalies in the system's behavior and thus, identifying attacks and classifying them. Using the training data, a detection threshold is computed to differentiate between normal and anomalous behavior. A series of tests were performed on the algorithm using false data injection and the effect of varying HMM parameters is studied. Finally, alterations to the IoT sensor node's functionality are made to mimic the effect of an attack. The method was found to be successful in identifying attacks, trojans and malfunctions as well as, detecting the type of change that has occurred in the system's performance.

The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004., Dec 23, 2004

IEEE 802.15.4 Wireless Sensor Networks (WSNs) possess additional vulnerabilities in comparison wi... more IEEE 802.15.4 Wireless Sensor Networks (WSNs) possess additional vulnerabilities in comparison with traditional wired and wireless networks, such as broadcast nature of wireless medium, dynamic network topology, resource- constrained nodes, lack of physical safeguards in nodes, and immense network scale. These inherent vulnerabilities present opportunities for attackers to launch novel and more complicated attacks against such networks. For this reason, a thorough investigation of the attacks which can be launched against WSNs is required. This paper provides a single unified survey that dissects all IEEE 802.15.4 MAC layer attacks known to date. While the majority of existing references investigate the motive and behavior of each attack separately, this survey addresses the interrelationships and differences between the attacks following their classification. The survey defines two main classifications for the attacks by combining and refining existing classifications of the attacks obtained from external references. The defined classifications are further extended by including additional attacks, which have been left out by other references, within the classifications. The authors' opinions and comments regarding the placement of the attacks within the defined classifications are also provided. A comparative analysis between the classified attacks is then performed with respect to a set of evaluation criteria defined within the paper.

The increasing cost of IC fabrication and the ever-shrinking transistor size forces IC Industry t... more The increasing cost of IC fabrication and the ever-shrinking transistor size forces IC Industry to move its fabrication facilities to cheaper less reliable sources. This process creates the chance of inserting malicious manipulations namely Hardware Trojans at different phases of the design cycle. Trojans are a real challenge to IC industry especially in an era of smart cities and connected sensors. In this paper, we propose a behavioral fragile IP watermarking technique that embeds the signature in finite state machines (FSMs) transitions to ensure design integrity. The inserted fragile mark is extremely sensitive to any design alterations, which makes it an excellent and economical choice to detect design changes. Finally, we analyze and evaluate different aspects of the proposed technique, including sensitivity to design changes, robustness, as well as complexity and insertion overhead to design cycle.

Design, Automation, and Test in Europe, Apr 1, 2005

Hardware Trojans are intrusive actions that tend to corrupt the functional behavior of genuine de... more Hardware Trojans are intrusive actions that tend to corrupt the functional behavior of genuine designs, leak their sensitive information, or even downgrade their performance. This paper proposes a Computer-Aided Design (CAD) tool for Fragile Hierarchical FSM Watermarking to be employed as a novel presilicon Trojan detection technique at the RTL level. The performance of the proposed watermarking tool, regarding its complexity and insertion time overhead, is evaluated. Moreover, an intentional Trojan insertion scenario is executed in order to verify the sensitivity and reliability of the presented tool against the least changes in the original RTL design.

2011 AGILE Conference, 2011

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2011

2018 International Conference on Computer and Applications (ICCA)

The increasing cost of IC fabrication and the ever-shrinking transistor size forces IC Industry t... more The increasing cost of IC fabrication and the ever-shrinking transistor size forces IC Industry to move its fabrication facilities to cheaper less reliable sources. This process creates the chance of inserting malicious manipulations namely Hardware Trojans at different phases of the design cycle. Trojans are a real challenge to IC industry especially in an era of smart cities and connected sensors. In this paper, we propose a behavioral fragile IP watermarking technique that embeds the signature in finite state machines (FSMs) transitions to ensure design integrity. The inserted fragile mark is extremely sensitive to any design alterations, which makes it an excellent and economical choice to detect design changes. Finally, we analyze and evaluate different aspects of the proposed technique, including sensitivity to design changes, robustness, as well as complexity and insertion overhead to design cycle.

Abstract. The IEEE-754 floating-point standard is considered one of the most important standards,... more Abstract. The IEEE-754 floating-point standard is considered one of the most important standards, and is used in nearly all floating-point applications. In this paper, we have formalized and verified a hardware implementation of the Table-Driven algorithm for the floating-point exponential function. Throughout this paper, we have used a hierarchical approach in formally modeling and verifying in HOL the floating-point exponential function from the gate level implementation up to a behavioral specification written by Harrison [7]. 1

Deep datapath and algorithm complexity have made the verification of floating-point units a very ... more Deep datapath and algorithm complexity have made the verification of floating-point units a very hard task. Most simulation and reachability analysis verification tools fail to verify a circuit with a deep datapath like most industrial floating-point units. Theorem proving, however, offers a better solution to handle such verification. In this paper, we have hierarchically formalized and verified a hardware implementation of the IEEE-754 table-driven floating-point exponential function algorithm using the higher-order logic (HOL) theorem prover. The high ability of abstraction in the HOL verification system allows its use for the verification task over the whole design path of the circuit, starting from gate-level implementation of the circuit up to a high-level mathematical specification.