Henry Selvaraj | Unlv - Academia.edu (original) (raw)
Papers by Henry Selvaraj
Advances in Systems Engineering, 2021
Advances in Intelligent Systems and Computing, 2015
2017 25th International Conference on Systems Engineering (ICSEng)
With increasing demand of performance constraints and the ever reducing size of the IC chips, ana... more With increasing demand of performance constraints and the ever reducing size of the IC chips, analog and mixed-signal designs have become indispensable and increasingly complex in modern CMOS technologies. This has resulted in the rise of stochastic behavior in circuits, making it important to detect all the corner cases and verify the correct functionality of the design under all circumstances during the earlier stages of the design process. It can be achieved by functional or formal verification methods, which are still widely unexplored for Analog and Mixed-Signal (AMS) designs.
Proceedings. International Conference on Information Technology: Coding and Computing
Since modern programmable devices contain embedded memory blocks, there exists a possibility to i... more Since modern programmable devices contain embedded memory blocks, there exists a possibility to implement Finite State Machines (FSM) using such blocks. The size of the memory available in programmable devices is limited, though. The paper presents a general method for the synthesis of sequential circuits using embedded memory blocks. The method is based on the serial decomposition concept and relies on decomposing the memory block into two blocks: a combinational address modifier and a smaller memory block. An appropriately chosen decomposition strategy may allow reducing the required memory size at the cost of additional logic cells for address modifier implementation. This makes possible implementation of FSMs that exceed available memory by using embedded memory blocks and additional programmable logic.
Recent Advances, 2008
This chapter, taking FIR filters as an example, presents the discussion on efficiency of differen... more This chapter, taking FIR filters as an example, presents the discussion on efficiency of different implementation methodologies of DSP algorithms targeting modern FPGA architectures. Nowadays, programmable technology provides the possibility to implement digital systems with the use of specialized embedded DSP blocks. However, this technology gives the designer the possibility to increase efficiency of designed systems by exploitation of parallelisms of implemented algorithms. Moreover, it is possible to apply special techniques, such as distributed arithmetic (DA). Since in this approach, general-purpose multipliers are replaced by combinational LUT blocks, it is possible to construct digital filters of very high performance. Additionally, application of the functional decomposition-based method to LUT blocks optimization, and mapping has been investigated. The chapter presents results of the comparison of various design approaches in these areas.
Proceedings of the EUROMICRO Systems on Digital System Design, DSD 2004, 2004
In recent years the functional decomposition has found an application in many fields of modern en... more In recent years the functional decomposition has found an application in many fields of modern engineering and science, such as combinational and sequential logic synthesis for VLSI systems, pattern analysis, knowledge discovery, machine learning, decision systems, data bases, data mining etc. However, the lack of an effective and efficient method of the input variable partitioning limits its practical usefulness in
Proceedings - DSD'2005: 8th Euromicro Conference on Digital System Design - Architectures, Methods and Tools, 2005
Proceedings - Sixth International Conference on Computational Intelligence and Multimedia Applications, ICCIMA 2005, 2005
This paper presents an FSM implementation method based on symbolic functional decomposition. This... more This paper presents an FSM implementation method based on symbolic functional decomposition. This novel approach in multilevel logic synthesis of finite state machines targets FPGA architectures. Traditional methods are based on two steps: internal state encoding and then mapping the encoded state transition table into target architecture. In the case of FPGAs, functional decomposition is recognized as the most efficient
2010 Fifth International Conference on Broadband and Biomedical Communications, 2010
Logic controller is a digital device used for automation of electromechanical processes, such as ... more Logic controller is a digital device used for automation of electromechanical processes, such as control of machinery on factory assembly line or lighting fixtures. This paper presents the method for designing a logic controller. We implement it using reprogrammable structure equipped with Embedded Memory Blocks, e.g. CPLD or FPGA. We find that specification of the controller with appropriate statechart diagram and further synthesis as equivalent Finite State Machine yields encouraging results: the number of programmable resources has been reduced approximately by 85%. Result of the research is illustrated with synthesis of practical controllers, where hardware resource consumption is presented. It shows the usefulness of the approach. 1 Index Terms-logic controller, statechart diagram, finite state machine, decomposition, embedded memory block View publication stats View publication stats
Journal of Systems Architecture, 2005
Modern FPLD devices have very complex structure. They combine PLA like structures, as well as FPG... more Modern FPLD devices have very complex structure. They combine PLA like structures, as well as FPGA and even memory-based structures. However lack of appropriate synthesis methods do not allow fully exploiting the possibilities the modern FPLDs offer. The paper presents a general method for the synthesis targeted to implementation of sequential circuits using embedded memory blocks. The method is based on the serial decomposition concept and relies on decomposing the memory block into two blocks: a combinational address modifier and a smaller memory block. An appropriately chosen decomposition strategy may allow reducing the required memory size at the cost of additional logic cells for address modifier implementation. This makes possible implementation of FSMs that exceed available memory by using embedded memory blocks and additional programmable logic.
International Journal of Computational Intelligence and Applications, 2006
This paper presents a Finite State Machine (FSM) implementation method based on symbolic function... more This paper presents a Finite State Machine (FSM) implementation method based on symbolic functional decomposition. This novel approach to multilevel logic synthesis of FSMs targets Field Programmable Gate Array (FPGA) architectures. Traditional methods consist of two steps: internal state encoding and then mapping the encoded state transition table into target architecture. In the case of FPGAs, functional decomposition is recognized as the most efficient method of implementing digital circuits. However, none of the known state encoding algorithms can be considered as a good method to be used with functional decomposition. In this paper, the concept of symbolic functional decomposition is applied to obtain a multilevel structure that is suitable for implementation in FPGA architectures. The symbolic functional decomposition does not require a separate encoding step. It accepts FSM description with symbolic states and performs decomposition, producing such a state encoding that guara...
International Journal of Computational Intelligence and Applications, 2008
An iteration-free fractal coding for image compression is proposed using genetic algorithm (GA) w... more An iteration-free fractal coding for image compression is proposed using genetic algorithm (GA) with elitist model. The proposed methodology reduces the coding process time by minimizing intensive computations. The proposed technique utilizes the GA, which greatly decreases the search space for finding the self-similarities in the given image. The performance of the proposed method is compared with the iteration-free fractal-based image coding using vector quantization method for both single block and Quad tree partition on benchmark images for parameters such as image quality and coding time. It is observed that the proposed method achieves excellent performance in image quality with reduction in computing time.
International Journal of Computational Intelligence and Applications, 2006
General functional decomposition is mainly perceived as a logic synthesis method for implementing... more General functional decomposition is mainly perceived as a logic synthesis method for implementing Boolean functions into FPGA-based architectures. However it also has important applications in many other fields of modern engineering and science. In this paper, advantages of functional decomposition are demonstrated on "real life" examples. Application of decomposition-based methods in other fields of modern engineering is presented. In the case of decision tables, application of decomposition methods leads to significant benefits in the analysis process of data dependencies, especially in cases when the input decision tables are unmanageably large. Experimental results demonstrate that it can help implementing sequential machines using flip-flops or ROM memory. It also can be efficiently used as multilevel logic synthesis method for VLSI technology.
General functional decomposition has important applications in many fields of modern engineering ... more General functional decomposition has important applications in many fields of modern engineering and science. However, it is mainly perceived as a method of logic synthesis for implementation of Boolean functions into FPGAbased architectures. In this paper, an application of functional decomposition in other fields of modern engineering is presented. The experimental results demonstrate that a method of synthesis based on functional decomposition can help in implementing sequential machines using flip-flops or ROM memory. It also can be efficiently used as a method of multilevel logic synthesis for VLSI technology.
Functional decomposition has important applications in many fields of modern engineering and scie... more Functional decomposition has important applications in many fields of modern engineering and science. Its practical usefulness for very complex systems is however limited by computational complexity and memory requirements of the existing algorithms. Efficiency of the currently used decomposition methods is dependent on the size of decomposed functions. Decomposition of combinational circuits described by truth tables with large number of
We con~ider the problem of computing m shortest paths between a source node_s and a target node t... more We con~ider the problem of computing m shortest paths between a source node_s and a target node tin a stage graph. Polynomial time algorithms known to solve this problem use complicated data structures. This paper proposes a very simple algorithm for computing all m shortest paths in a stage graph efficiently. The proposed algorithm does not use any complicated data structure and can be implemented in a straightforward way by using only array data structure. This problem appears as a sub-problem for planning risk redl\ced multiple k-legged trajectories for aerial vehicles.
Systems science, 2009
LAXMI GEWALI*, NAVIN RONGATANA*, HENRY SELVARAJ*, JANB. PEDERSEN* FREE REGIONS OF SENSOR NODES We... more LAXMI GEWALI*, NAVIN RONGATANA*, HENRY SELVARAJ*, JANB. PEDERSEN* FREE REGIONS OF SENSOR NODES We introduce the notion of free region of a node in a sensor network. Intuitively, a free region of a node is the connected set of points R in its neighborhood such that the connectivity of the network remains the same when the node is moved to any point in R. We characterize several properties of free regions and develop an efficient algorithm for computing them. We capture free region in terms of related notions called in-free region and out-free region. We present an O(n 2) algorithm for constructing the free region of a node, where n is the number of nodes in the network.
Systems science, 2010
One of possible situations for cooperative flights could be a scenario when the decision on a new... more One of possible situations for cooperative flights could be a scenario when the decision on a new path is taken by a certain fleet member, who is called the leader. The update on the new path is transmitted to the fleet members via communication that can be noisy. An optical sensor can be used as a backup for re-estimating the path parameters based on visual information. For a certain topology, the problem can be solved by continuous tracking of the leader of the fleet in the video sequence and readjusting parameters of the flight, accordingly. To solve such a problem a real time system has been developed for recognizing and tracking 3D objects. Any change in the 3D position of the leading object is determined by the on-board system and adjustments of the speed, pitch, yaw and roll angles are made to sustain the topology. Given a 2D image acquired by an on-board camera, the system has to perform the background subtraction, recognize the object, track it and evaluate the relative rotation, scale and translation of the object. In this paper, a comparative study of different algorithms is carried out based on time and accuracy constraints. The solution for 3D pose estimation is provided based on the system of Zemike invariant moments. The candidate techniques solving the complete set of procedures have been implemented on Texas Instrument TMS320DM642 EVM board. It is shown that 14 frames per second can be processed; that supports the real time implementation of the tracking system with the reasonable accuracy.
Advances in Systems Engineering, 2021
Advances in Intelligent Systems and Computing, 2015
2017 25th International Conference on Systems Engineering (ICSEng)
With increasing demand of performance constraints and the ever reducing size of the IC chips, ana... more With increasing demand of performance constraints and the ever reducing size of the IC chips, analog and mixed-signal designs have become indispensable and increasingly complex in modern CMOS technologies. This has resulted in the rise of stochastic behavior in circuits, making it important to detect all the corner cases and verify the correct functionality of the design under all circumstances during the earlier stages of the design process. It can be achieved by functional or formal verification methods, which are still widely unexplored for Analog and Mixed-Signal (AMS) designs.
Proceedings. International Conference on Information Technology: Coding and Computing
Since modern programmable devices contain embedded memory blocks, there exists a possibility to i... more Since modern programmable devices contain embedded memory blocks, there exists a possibility to implement Finite State Machines (FSM) using such blocks. The size of the memory available in programmable devices is limited, though. The paper presents a general method for the synthesis of sequential circuits using embedded memory blocks. The method is based on the serial decomposition concept and relies on decomposing the memory block into two blocks: a combinational address modifier and a smaller memory block. An appropriately chosen decomposition strategy may allow reducing the required memory size at the cost of additional logic cells for address modifier implementation. This makes possible implementation of FSMs that exceed available memory by using embedded memory blocks and additional programmable logic.
Recent Advances, 2008
This chapter, taking FIR filters as an example, presents the discussion on efficiency of differen... more This chapter, taking FIR filters as an example, presents the discussion on efficiency of different implementation methodologies of DSP algorithms targeting modern FPGA architectures. Nowadays, programmable technology provides the possibility to implement digital systems with the use of specialized embedded DSP blocks. However, this technology gives the designer the possibility to increase efficiency of designed systems by exploitation of parallelisms of implemented algorithms. Moreover, it is possible to apply special techniques, such as distributed arithmetic (DA). Since in this approach, general-purpose multipliers are replaced by combinational LUT blocks, it is possible to construct digital filters of very high performance. Additionally, application of the functional decomposition-based method to LUT blocks optimization, and mapping has been investigated. The chapter presents results of the comparison of various design approaches in these areas.
Proceedings of the EUROMICRO Systems on Digital System Design, DSD 2004, 2004
In recent years the functional decomposition has found an application in many fields of modern en... more In recent years the functional decomposition has found an application in many fields of modern engineering and science, such as combinational and sequential logic synthesis for VLSI systems, pattern analysis, knowledge discovery, machine learning, decision systems, data bases, data mining etc. However, the lack of an effective and efficient method of the input variable partitioning limits its practical usefulness in
Proceedings - DSD'2005: 8th Euromicro Conference on Digital System Design - Architectures, Methods and Tools, 2005
Proceedings - Sixth International Conference on Computational Intelligence and Multimedia Applications, ICCIMA 2005, 2005
This paper presents an FSM implementation method based on symbolic functional decomposition. This... more This paper presents an FSM implementation method based on symbolic functional decomposition. This novel approach in multilevel logic synthesis of finite state machines targets FPGA architectures. Traditional methods are based on two steps: internal state encoding and then mapping the encoded state transition table into target architecture. In the case of FPGAs, functional decomposition is recognized as the most efficient
2010 Fifth International Conference on Broadband and Biomedical Communications, 2010
Logic controller is a digital device used for automation of electromechanical processes, such as ... more Logic controller is a digital device used for automation of electromechanical processes, such as control of machinery on factory assembly line or lighting fixtures. This paper presents the method for designing a logic controller. We implement it using reprogrammable structure equipped with Embedded Memory Blocks, e.g. CPLD or FPGA. We find that specification of the controller with appropriate statechart diagram and further synthesis as equivalent Finite State Machine yields encouraging results: the number of programmable resources has been reduced approximately by 85%. Result of the research is illustrated with synthesis of practical controllers, where hardware resource consumption is presented. It shows the usefulness of the approach. 1 Index Terms-logic controller, statechart diagram, finite state machine, decomposition, embedded memory block View publication stats View publication stats
Journal of Systems Architecture, 2005
Modern FPLD devices have very complex structure. They combine PLA like structures, as well as FPG... more Modern FPLD devices have very complex structure. They combine PLA like structures, as well as FPGA and even memory-based structures. However lack of appropriate synthesis methods do not allow fully exploiting the possibilities the modern FPLDs offer. The paper presents a general method for the synthesis targeted to implementation of sequential circuits using embedded memory blocks. The method is based on the serial decomposition concept and relies on decomposing the memory block into two blocks: a combinational address modifier and a smaller memory block. An appropriately chosen decomposition strategy may allow reducing the required memory size at the cost of additional logic cells for address modifier implementation. This makes possible implementation of FSMs that exceed available memory by using embedded memory blocks and additional programmable logic.
International Journal of Computational Intelligence and Applications, 2006
This paper presents a Finite State Machine (FSM) implementation method based on symbolic function... more This paper presents a Finite State Machine (FSM) implementation method based on symbolic functional decomposition. This novel approach to multilevel logic synthesis of FSMs targets Field Programmable Gate Array (FPGA) architectures. Traditional methods consist of two steps: internal state encoding and then mapping the encoded state transition table into target architecture. In the case of FPGAs, functional decomposition is recognized as the most efficient method of implementing digital circuits. However, none of the known state encoding algorithms can be considered as a good method to be used with functional decomposition. In this paper, the concept of symbolic functional decomposition is applied to obtain a multilevel structure that is suitable for implementation in FPGA architectures. The symbolic functional decomposition does not require a separate encoding step. It accepts FSM description with symbolic states and performs decomposition, producing such a state encoding that guara...
International Journal of Computational Intelligence and Applications, 2008
An iteration-free fractal coding for image compression is proposed using genetic algorithm (GA) w... more An iteration-free fractal coding for image compression is proposed using genetic algorithm (GA) with elitist model. The proposed methodology reduces the coding process time by minimizing intensive computations. The proposed technique utilizes the GA, which greatly decreases the search space for finding the self-similarities in the given image. The performance of the proposed method is compared with the iteration-free fractal-based image coding using vector quantization method for both single block and Quad tree partition on benchmark images for parameters such as image quality and coding time. It is observed that the proposed method achieves excellent performance in image quality with reduction in computing time.
International Journal of Computational Intelligence and Applications, 2006
General functional decomposition is mainly perceived as a logic synthesis method for implementing... more General functional decomposition is mainly perceived as a logic synthesis method for implementing Boolean functions into FPGA-based architectures. However it also has important applications in many other fields of modern engineering and science. In this paper, advantages of functional decomposition are demonstrated on "real life" examples. Application of decomposition-based methods in other fields of modern engineering is presented. In the case of decision tables, application of decomposition methods leads to significant benefits in the analysis process of data dependencies, especially in cases when the input decision tables are unmanageably large. Experimental results demonstrate that it can help implementing sequential machines using flip-flops or ROM memory. It also can be efficiently used as multilevel logic synthesis method for VLSI technology.
General functional decomposition has important applications in many fields of modern engineering ... more General functional decomposition has important applications in many fields of modern engineering and science. However, it is mainly perceived as a method of logic synthesis for implementation of Boolean functions into FPGAbased architectures. In this paper, an application of functional decomposition in other fields of modern engineering is presented. The experimental results demonstrate that a method of synthesis based on functional decomposition can help in implementing sequential machines using flip-flops or ROM memory. It also can be efficiently used as a method of multilevel logic synthesis for VLSI technology.
Functional decomposition has important applications in many fields of modern engineering and scie... more Functional decomposition has important applications in many fields of modern engineering and science. Its practical usefulness for very complex systems is however limited by computational complexity and memory requirements of the existing algorithms. Efficiency of the currently used decomposition methods is dependent on the size of decomposed functions. Decomposition of combinational circuits described by truth tables with large number of
We con~ider the problem of computing m shortest paths between a source node_s and a target node t... more We con~ider the problem of computing m shortest paths between a source node_s and a target node tin a stage graph. Polynomial time algorithms known to solve this problem use complicated data structures. This paper proposes a very simple algorithm for computing all m shortest paths in a stage graph efficiently. The proposed algorithm does not use any complicated data structure and can be implemented in a straightforward way by using only array data structure. This problem appears as a sub-problem for planning risk redl\ced multiple k-legged trajectories for aerial vehicles.
Systems science, 2009
LAXMI GEWALI*, NAVIN RONGATANA*, HENRY SELVARAJ*, JANB. PEDERSEN* FREE REGIONS OF SENSOR NODES We... more LAXMI GEWALI*, NAVIN RONGATANA*, HENRY SELVARAJ*, JANB. PEDERSEN* FREE REGIONS OF SENSOR NODES We introduce the notion of free region of a node in a sensor network. Intuitively, a free region of a node is the connected set of points R in its neighborhood such that the connectivity of the network remains the same when the node is moved to any point in R. We characterize several properties of free regions and develop an efficient algorithm for computing them. We capture free region in terms of related notions called in-free region and out-free region. We present an O(n 2) algorithm for constructing the free region of a node, where n is the number of nodes in the network.
Systems science, 2010
One of possible situations for cooperative flights could be a scenario when the decision on a new... more One of possible situations for cooperative flights could be a scenario when the decision on a new path is taken by a certain fleet member, who is called the leader. The update on the new path is transmitted to the fleet members via communication that can be noisy. An optical sensor can be used as a backup for re-estimating the path parameters based on visual information. For a certain topology, the problem can be solved by continuous tracking of the leader of the fleet in the video sequence and readjusting parameters of the flight, accordingly. To solve such a problem a real time system has been developed for recognizing and tracking 3D objects. Any change in the 3D position of the leading object is determined by the on-board system and adjustments of the speed, pitch, yaw and roll angles are made to sustain the topology. Given a 2D image acquired by an on-board camera, the system has to perform the background subtraction, recognize the object, track it and evaluate the relative rotation, scale and translation of the object. In this paper, a comparative study of different algorithms is carried out based on time and accuracy constraints. The solution for 3D pose estimation is provided based on the system of Zemike invariant moments. The candidate techniques solving the complete set of procedures have been implemented on Texas Instrument TMS320DM642 EVM board. It is shown that 14 frames per second can be processed; that supports the real time implementation of the tracking system with the reasonable accuracy.