Marco Caccamo | University of Illinois at Urbana-Champaign (original) (raw)

Papers by Marco Caccamo

The Author Index contains the primary entry for each item, listed under the first author's name. ... more The Author Index contains the primary entry for each item, listed under the first author's name. The primary entry includes the coauthors' names, the title of the paper or other item, and its location, specified by the publication abbreviation, year, month, and inclusive pagination. The Subject Index contains entries describing the item under all appropriate subject headings, plus the first author's name, the publication abbreviation, month, and year, and inclusive pages. Subject cross-references are included to assist in finding items of interest.

Abstract We address the problem of scheduling real-time transactions in Network-on-Chip (NoC). In... more Abstract We address the problem of scheduling real-time transactions in Network-on-Chip (NoC). In particular, we propose a novel slot-based scheduling algorithm for acyclic transaction sets in NoC. The algorithm induces a competitive sufficient schedulability utilization bound. Since the proposed algorithm is able to exploit the parallelism between non-overlapping transactions, under given assumptions, it performs better than the existing fixed-priority solutions.

The PN sequence is also a sequence of±1 rectangular pulses, with a+ 1 pulse representing digit “1... more The PN sequence is also a sequence of±1 rectangular pulses, with a+ 1 pulse representing digit “1” and a− 1 pulse for digit “0”. Each digit of a PN sequence is called a chip. The number of PN chips generated per second is called chip rate, represented by rc, chip duration Tc is defined as Tc def= 1 rc

Abstract Wireless LAN for industrial control (IC-WLAN) provides many benefits, such as mobility, ... more Abstract Wireless LAN for industrial control (IC-WLAN) provides many benefits, such as mobility, low deployment cost, and ease of reconfiguration. However, the top concern is robustness of wireless communications. Wireless control loops must be maintained under persistent adverse channel conditions, such as noise, large-scale path loss, fading, and many electromagnetic interference sources in industrial environments.

Abstract Operating systems for reconfigurable devices enable the development of embedded systems ... more Abstract Operating systems for reconfigurable devices enable the development of embedded systems where software tasks, running on a CPU, can coexist with hardware tasks running on a reconfigurable hardware device (FPGA). Furthermore, in such systems relocatable tasks can be migrated from software to hardware and viceversa.

Abstract In this paper, we address the problem of scheduling hybrid task sets consisting of hard ... more Abstract In this paper, we address the problem of scheduling hybrid task sets consisting of hard periodic and soft aperiodic tasks that may share resources in exclusive mode in a dynamic environment, where tasks are scheduled based on their deadlines. Bounded blocking on exclusive resources is achieved by means of a dynamic resource access protocol which also prevents deadlocks and chained blocking.

Abstract COTS peripherals are heavily used in the embedded market, but their unpredictability is ... more Abstract COTS peripherals are heavily used in the embedded market, but their unpredictability is a threat for high-criticality real-time systems: it is hard or impossible to formally verify COTS components. Instead, we propose to monitor the runtime behavior of COTS peripherals against their assumed specifications. If violations are detected, then an appropriate recovery measure can be taken.

Abstract Embedded systems in safety-critical environments demand safety guarantees while providin... more Abstract Embedded systems in safety-critical environments demand safety guarantees while providing many useful services that are too complex to formally verify or fully test. Existing application-level fault-tolerance methods, even if formally verified, leave the system vulnerable to errors in the real-time operating system (RTOS), middleware, and microprocessor.

Abstract: Until recently, cyber-physical systems, especially those with safety-critical propertie... more Abstract: Until recently, cyber-physical systems, especially those with safety-critical properties that manage critical infrastructure (eg power generation plants, water treatment facilities, etc.) were considered to be invulnerable against software security breaches. The recently discovered'W32. Stuxnet'worm has drastically changed this perception by demonstrating that such systems are susceptible to external attacks.

Abstract Multi-processor and multi-core systems are becoming increasingly important in time criti... more Abstract Multi-processor and multi-core systems are becoming increasingly important in time critical systems. Shared resources, such as shared memory or communication buses are used to share data and read sensors. We consider real-time tasks constituted by superblocks, which can be executed sequentially or by a time triggered static schedule.

Abstract Modern multiprocessor and multicore architectures adopt shared resources to meet increas... more Abstract Modern multiprocessor and multicore architectures adopt shared resources to meet increased performance requirements. Adaptive arbiters, such as FlexRay, have been adopted to grant access to shared resources. While increasing the performance, timing analysis is more challenging with this kind of arbiter. This paper considers real-time tasks that are composed of super blocks, while super blocks themselves are composed of phases.

Abstract We address the problem of scheduling real-time data transactions on a multicore processo... more Abstract We address the problem of scheduling real-time data transactions on a multicore processor bus. In particular, to in-crease system predictability and tighten WCET estimation, we propose to employ a software-controllable Multi-Domain Ring Bus (MDRB) architecture.

Abstract In this paper we discuss a general approach and architecture for design of distributed c... more Abstract In this paper we discuss a general approach and architecture for design of distributed cyber-physical systems in order to make them resilient to communication faults. In this approach, each node exploits physical connections between nodes to estimate some of the state parameters of the remote nodes in order to detect the faults and also to maintain stability of system after fault occurrence. Finally, based on this architecture and approach, a fault-resilient decentralized voltage control algorithm is presented and evaluated.

The proliferation of computing systems into all walks of life has led to significant improvements... more The proliferation of computing systems into all walks of life has led to significant improvements (savings in time and cost) in the manner in which we perform our day-to-day activities. This trend continues unabated with the embedding of computing systems into many physical objects. The fusion of computing environments with the physical environment places extraordinary emphasis on the convergence of computation, communication and control.

Abstract In systems such as integrated modular avionics (IMA), there is a substantial benefit fro... more Abstract In systems such as integrated modular avionics (IMA), there is a substantial benefit from maintaining significant portions of a product family's architecture unchanged from one system to the next. When there are tight constraints on resources such as bandwidth and processor capacity, however, certain seemingly small changes in a few components have the potential to create a cascade of timing problems.

In this research, we propose a real-time scheduling framework on the CellBE microprocessor [5], i... more In this research, we propose a real-time scheduling framework on the CellBE microprocessor [5], in order to handle the problem of unpredictable task execution time in hard real-time systems. A hard real-time system has strict requirements on timing behavior of tasks:(1) task worst case execution times (WCET) must be reliably estimated and (2) task deadlines must be guaranteed. Unfortunately, the modern computer architecture has been designed in such a way that the estimation of a tight bound WCET is very difficult.

Abstract Wireless networks are increasingly being used for latency-sensitive applications that re... more Abstract Wireless networks are increasingly being used for latency-sensitive applications that require data delivery to be timely, efficient and reliable. This trend is primarily driven by the proliferation of wireless networks of real-time data-gathering sensor-actuator devices. This has led to a strong need to bring real-time concerns to the forefront of an integrated research thrust into wireless real-time systems. In this paper, we introduce and analyze a specific instance of the rich set of problems in this domain.

This index covers all technical items—papers, correspondence, reviews, etc.—that appeared in this... more This index covers all technical items—papers, correspondence, reviews, etc.—that appeared in this periodical during 2008, and items from previous years that were commented upon or corrected in 2008. Departments and other items may also be covered if they have been judged to have archival value. The Author Index contains the primary entry for each item, listed under the first author's name.

Abstract Shared resource access interference, particularly memory and system bus, is a big challe... more Abstract Shared resource access interference, particularly memory and system bus, is a big challenge in designing predictable real-time systems because its worst case behavior can significantly differ. In this paper, we propose a software based memory throttling mechanism to explicitly control the memory interference. We developed analytic solutions to compute proper throttling parameters that satisfy schedulability of critical tasks while minimize performance impact caused by throttling.

The Author Index contains the primary entry for each item, listed under the first author's name. ... more The Author Index contains the primary entry for each item, listed under the first author's name. The primary entry includes the coauthors' names, the title of the paper or other item, and its location, specified by the publication abbreviation, year, month, and inclusive pagination. The Subject Index contains entries describing the item under all appropriate subject headings, plus the first author's name, the publication abbreviation, month, and year, and inclusive pages. Subject cross-references are included to assist in finding items of interest.

Abstract We address the problem of scheduling real-time transactions in Network-on-Chip (NoC). In... more Abstract We address the problem of scheduling real-time transactions in Network-on-Chip (NoC). In particular, we propose a novel slot-based scheduling algorithm for acyclic transaction sets in NoC. The algorithm induces a competitive sufficient schedulability utilization bound. Since the proposed algorithm is able to exploit the parallelism between non-overlapping transactions, under given assumptions, it performs better than the existing fixed-priority solutions.

The PN sequence is also a sequence of±1 rectangular pulses, with a+ 1 pulse representing digit “1... more The PN sequence is also a sequence of±1 rectangular pulses, with a+ 1 pulse representing digit “1” and a− 1 pulse for digit “0”. Each digit of a PN sequence is called a chip. The number of PN chips generated per second is called chip rate, represented by rc, chip duration Tc is defined as Tc def= 1 rc

Abstract Wireless LAN for industrial control (IC-WLAN) provides many benefits, such as mobility, ... more Abstract Wireless LAN for industrial control (IC-WLAN) provides many benefits, such as mobility, low deployment cost, and ease of reconfiguration. However, the top concern is robustness of wireless communications. Wireless control loops must be maintained under persistent adverse channel conditions, such as noise, large-scale path loss, fading, and many electromagnetic interference sources in industrial environments.

Abstract Operating systems for reconfigurable devices enable the development of embedded systems ... more Abstract Operating systems for reconfigurable devices enable the development of embedded systems where software tasks, running on a CPU, can coexist with hardware tasks running on a reconfigurable hardware device (FPGA). Furthermore, in such systems relocatable tasks can be migrated from software to hardware and viceversa.

Abstract In this paper, we address the problem of scheduling hybrid task sets consisting of hard ... more Abstract In this paper, we address the problem of scheduling hybrid task sets consisting of hard periodic and soft aperiodic tasks that may share resources in exclusive mode in a dynamic environment, where tasks are scheduled based on their deadlines. Bounded blocking on exclusive resources is achieved by means of a dynamic resource access protocol which also prevents deadlocks and chained blocking.

Abstract COTS peripherals are heavily used in the embedded market, but their unpredictability is ... more Abstract COTS peripherals are heavily used in the embedded market, but their unpredictability is a threat for high-criticality real-time systems: it is hard or impossible to formally verify COTS components. Instead, we propose to monitor the runtime behavior of COTS peripherals against their assumed specifications. If violations are detected, then an appropriate recovery measure can be taken.

Abstract Embedded systems in safety-critical environments demand safety guarantees while providin... more Abstract Embedded systems in safety-critical environments demand safety guarantees while providing many useful services that are too complex to formally verify or fully test. Existing application-level fault-tolerance methods, even if formally verified, leave the system vulnerable to errors in the real-time operating system (RTOS), middleware, and microprocessor.

Abstract: Until recently, cyber-physical systems, especially those with safety-critical propertie... more Abstract: Until recently, cyber-physical systems, especially those with safety-critical properties that manage critical infrastructure (eg power generation plants, water treatment facilities, etc.) were considered to be invulnerable against software security breaches. The recently discovered'W32. Stuxnet'worm has drastically changed this perception by demonstrating that such systems are susceptible to external attacks.

Abstract Multi-processor and multi-core systems are becoming increasingly important in time criti... more Abstract Multi-processor and multi-core systems are becoming increasingly important in time critical systems. Shared resources, such as shared memory or communication buses are used to share data and read sensors. We consider real-time tasks constituted by superblocks, which can be executed sequentially or by a time triggered static schedule.

Abstract Modern multiprocessor and multicore architectures adopt shared resources to meet increas... more Abstract Modern multiprocessor and multicore architectures adopt shared resources to meet increased performance requirements. Adaptive arbiters, such as FlexRay, have been adopted to grant access to shared resources. While increasing the performance, timing analysis is more challenging with this kind of arbiter. This paper considers real-time tasks that are composed of super blocks, while super blocks themselves are composed of phases.

Abstract We address the problem of scheduling real-time data transactions on a multicore processo... more Abstract We address the problem of scheduling real-time data transactions on a multicore processor bus. In particular, to in-crease system predictability and tighten WCET estimation, we propose to employ a software-controllable Multi-Domain Ring Bus (MDRB) architecture.

Abstract In this paper we discuss a general approach and architecture for design of distributed c... more Abstract In this paper we discuss a general approach and architecture for design of distributed cyber-physical systems in order to make them resilient to communication faults. In this approach, each node exploits physical connections between nodes to estimate some of the state parameters of the remote nodes in order to detect the faults and also to maintain stability of system after fault occurrence. Finally, based on this architecture and approach, a fault-resilient decentralized voltage control algorithm is presented and evaluated.

The proliferation of computing systems into all walks of life has led to significant improvements... more The proliferation of computing systems into all walks of life has led to significant improvements (savings in time and cost) in the manner in which we perform our day-to-day activities. This trend continues unabated with the embedding of computing systems into many physical objects. The fusion of computing environments with the physical environment places extraordinary emphasis on the convergence of computation, communication and control.

Abstract In systems such as integrated modular avionics (IMA), there is a substantial benefit fro... more Abstract In systems such as integrated modular avionics (IMA), there is a substantial benefit from maintaining significant portions of a product family's architecture unchanged from one system to the next. When there are tight constraints on resources such as bandwidth and processor capacity, however, certain seemingly small changes in a few components have the potential to create a cascade of timing problems.

In this research, we propose a real-time scheduling framework on the CellBE microprocessor [5], i... more In this research, we propose a real-time scheduling framework on the CellBE microprocessor [5], in order to handle the problem of unpredictable task execution time in hard real-time systems. A hard real-time system has strict requirements on timing behavior of tasks:(1) task worst case execution times (WCET) must be reliably estimated and (2) task deadlines must be guaranteed. Unfortunately, the modern computer architecture has been designed in such a way that the estimation of a tight bound WCET is very difficult.

Abstract Wireless networks are increasingly being used for latency-sensitive applications that re... more Abstract Wireless networks are increasingly being used for latency-sensitive applications that require data delivery to be timely, efficient and reliable. This trend is primarily driven by the proliferation of wireless networks of real-time data-gathering sensor-actuator devices. This has led to a strong need to bring real-time concerns to the forefront of an integrated research thrust into wireless real-time systems. In this paper, we introduce and analyze a specific instance of the rich set of problems in this domain.

This index covers all technical items—papers, correspondence, reviews, etc.—that appeared in this... more This index covers all technical items—papers, correspondence, reviews, etc.—that appeared in this periodical during 2008, and items from previous years that were commented upon or corrected in 2008. Departments and other items may also be covered if they have been judged to have archival value. The Author Index contains the primary entry for each item, listed under the first author's name.

Abstract Shared resource access interference, particularly memory and system bus, is a big challe... more Abstract Shared resource access interference, particularly memory and system bus, is a big challenge in designing predictable real-time systems because its worst case behavior can significantly differ. In this paper, we propose a software based memory throttling mechanism to explicitly control the memory interference. We developed analytic solutions to compute proper throttling parameters that satisfy schedulability of critical tasks while minimize performance impact caused by throttling.