Georgi Gaydadjiev | Imperial College London (original) (raw)
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Papers by Georgi Gaydadjiev
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2 Guest Editors' Introduction: Multicore: The View from Europe Mateo Valero and Nacho Navarr... more 2 Guest Editors' Introduction: Multicore: The View from Europe Mateo Valero and Nacho Navarro ... 5 ArchExplorer for Automatic Design Space Exploration Veerle Desmet, Sylvain Girbal, Alex Ramirez, Augusto Vega, and Olivier Temam ... 16 The SARC Architecture Alex Ramirez, Felipe Cabarcas, Ben Juurlink, Mauricio Alvarez Mesa, Friman Sanchez, Arnaldo Azevedo, Cor Meenderinck, Ca˘ta˘lin Ciobanu, Sebastian Isaza, and Georgi Gaydadjiev ... 30 Explicit Communication and Synchronization in SARC Manolis GH Katevenis, Vassilis Papaefstathiou, Stamatis ...
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2009 International Conference on Complex, Intelligent and Software Intensive Systems, 2009
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Microprocessors and Microsystems, 2013
ABSTRACT The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fa... more ABSTRACT The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such changes in the technological landscape, current solutions for fault tolerance are expected to introduce excessive overheads in future systems. Moreover, attempting to design and manufacture a totally defect-/fault-free system, would impact heavily, even prohibitively, the design, manufacturing, and testing costs, as well as the system performance and power consumption. In this context, DeSyRe delivers a new generation of systems that are reliable by design at well-balanced power, performance, and design costs. In our attempt to reduce the overheads of fault-tolerance, only a small fraction of the chip is built to be fault-free. This fault-free part is then employed to manage the remaining fault-prone resources of the SoC. The DeSyRe framework is applied to two medical systems with high safety requirements (measured using the IEC 61508 functional safety standard) and tight power and performance constraints.
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2014 43rd International Conference on Parallel Processing, 2014
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IEEE Computer Architecture Letters, 2011
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2010 International Conference on Field Programmable Logic and Applications, 2010
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2009 International Conference on High Performance Switching and Routing, 2009
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Proceedings of the 8th ACM International Conference on Computing Frontiers - CF '11, 2011
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USENIX Systems Administration Conference, 2000
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Reconfigurable Computing, 2011
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Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems - CASES '10, 2010
ABSTRACT
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2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2013
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13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010
ABSTRACT
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13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010
ABSTRACT
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2 Guest Editors' Introduction: Multicore: The View from Europe Mateo Valero and Nacho Navarr... more 2 Guest Editors' Introduction: Multicore: The View from Europe Mateo Valero and Nacho Navarro ... 5 ArchExplorer for Automatic Design Space Exploration Veerle Desmet, Sylvain Girbal, Alex Ramirez, Augusto Vega, and Olivier Temam ... 16 The SARC Architecture Alex Ramirez, Felipe Cabarcas, Ben Juurlink, Mauricio Alvarez Mesa, Friman Sanchez, Arnaldo Azevedo, Cor Meenderinck, Ca˘ta˘lin Ciobanu, Sebastian Isaza, and Georgi Gaydadjiev ... 30 Explicit Communication and Synchronization in SARC Manolis GH Katevenis, Vassilis Papaefstathiou, Stamatis ...
Bookmarks Related papers MentionsView impact
2009 International Conference on Complex, Intelligent and Software Intensive Systems, 2009
Bookmarks Related papers MentionsView impact
Bookmarks Related papers MentionsView impact
Bookmarks Related papers MentionsView impact
Bookmarks Related papers MentionsView impact
Microprocessors and Microsystems, 2013
ABSTRACT The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fa... more ABSTRACT The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such changes in the technological landscape, current solutions for fault tolerance are expected to introduce excessive overheads in future systems. Moreover, attempting to design and manufacture a totally defect-/fault-free system, would impact heavily, even prohibitively, the design, manufacturing, and testing costs, as well as the system performance and power consumption. In this context, DeSyRe delivers a new generation of systems that are reliable by design at well-balanced power, performance, and design costs. In our attempt to reduce the overheads of fault-tolerance, only a small fraction of the chip is built to be fault-free. This fault-free part is then employed to manage the remaining fault-prone resources of the SoC. The DeSyRe framework is applied to two medical systems with high safety requirements (measured using the IEC 61508 functional safety standard) and tight power and performance constraints.
Bookmarks Related papers MentionsView impact
Bookmarks Related papers MentionsView impact
Bookmarks Related papers MentionsView impact
2014 43rd International Conference on Parallel Processing, 2014
Bookmarks Related papers MentionsView impact
IEEE Computer Architecture Letters, 2011
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2010 International Conference on Field Programmable Logic and Applications, 2010
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2009 International Conference on High Performance Switching and Routing, 2009
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Proceedings of the 8th ACM International Conference on Computing Frontiers - CF '11, 2011
Bookmarks Related papers MentionsView impact
USENIX Systems Administration Conference, 2000
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Reconfigurable Computing, 2011
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Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems - CASES '10, 2010
ABSTRACT
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2013 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2013
Bookmarks Related papers MentionsView impact
13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010
ABSTRACT
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13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2010
ABSTRACT
Bookmarks Related papers MentionsView impact