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Papers by Aitor Morillo
2011 VII Southern Conference on Programmable Logic (SPL), 2011
... Aitor Morillo, Armando Astarloa, Jesús Lázaro, Unai Bidarte and Jaime Jimenez ... Supplementa... more ... Aitor Morillo, Armando Astarloa, Jesús Lázaro, Unai Bidarte and Jaime Jimenez ... Supplementary to the soft small processor they add additional specific hard-ware logic depending on the application and a standard in-terface for connecting them to a communication bus. ...
2010 International Conference on Applied Electronics, 2010
The need of critical applications has derived in the development of several techniques that aim t... more The need of critical applications has derived in the development of several techniques that aim to guarantee system operability. The vast majority of these systems own a microprocessor to control its functionality. Thus, system reliability largely depends on the proper function of the microprocessor. This article presents a state of the art in the techniques for reliable microprocessor architectures for FPGAs. One of this techniques, Triple Modular Redundancy (TMR) combined with Dynamic Partial Reconfiguration (DPR), allows the development of coarse grain modularity architectures where the redundant module is the soft-core microprocessor. However, its main lack is a suitable synchronization method for the faulty module. This paper shows the trends on synchronization methods and proposes the use of an Autonomous Fault Tolerant System (AFTS) for developing a more suitable synchronization method.
Applied Electronics ( …, 2010
... Aitor Morillo1, Armando Astarloa2, Jesús Lázaro3, Unai Bidarte4, Jaime Jimenez5 Escuela Técni... more ... Aitor Morillo1, Armando Astarloa2, Jesús Lázaro3, Unai Bidarte4, Jaime Jimenez5 Escuela Técnica Superior de Ingeniería de Bilbao Alameda Urquijo s/n 48013 - Bilbao 1aitor.morillo@ ehu.es 2armando.astarloa@ehu.es 3jesus.lazaro@ehu.es 4unai.bidarte@ehu.es 5jaime ...
2011 VII Southern Conference on Programmable Logic (SPL), 2011
... Aitor Morillo, Armando Astarloa, Jesús Lázaro, Unai Bidarte and Jaime Jimenez ... Supplementa... more ... Aitor Morillo, Armando Astarloa, Jesús Lázaro, Unai Bidarte and Jaime Jimenez ... Supplementary to the soft small processor they add additional specific hard-ware logic depending on the application and a standard in-terface for connecting them to a communication bus. ...
... Aitor Morillo1, Armando Astarloa2, Jesús Lázaro3, Unai Bidarte4, Jaime Jimenez5 Escuela Técni... more ... Aitor Morillo1, Armando Astarloa2, Jesús Lázaro3, Unai Bidarte4, Jaime Jimenez5 Escuela Técnica Superior de Ingeniería de Bilbao Alameda Urquijo s/n 48013 - Bilbao 1aitor.morillo@ ehu.es 2armando.astarloa@ehu.es 3jesus.lazaro@ehu.es 4unai.bidarte@ehu.es 5jaime ...
2011 VII Southern Conference on Programmable Logic (SPL), 2011
... Aitor Morillo, Armando Astarloa, Jesús Lázaro, Unai Bidarte and Jaime Jimenez ... Supplementa... more ... Aitor Morillo, Armando Astarloa, Jesús Lázaro, Unai Bidarte and Jaime Jimenez ... Supplementary to the soft small processor they add additional specific hard-ware logic depending on the application and a standard in-terface for connecting them to a communication bus. ...
2010 International Conference on Applied Electronics, 2010
The need of critical applications has derived in the development of several techniques that aim t... more The need of critical applications has derived in the development of several techniques that aim to guarantee system operability. The vast majority of these systems own a microprocessor to control its functionality. Thus, system reliability largely depends on the proper function of the microprocessor. This article presents a state of the art in the techniques for reliable microprocessor architectures for FPGAs. One of this techniques, Triple Modular Redundancy (TMR) combined with Dynamic Partial Reconfiguration (DPR), allows the development of coarse grain modularity architectures where the redundant module is the soft-core microprocessor. However, its main lack is a suitable synchronization method for the faulty module. This paper shows the trends on synchronization methods and proposes the use of an Autonomous Fault Tolerant System (AFTS) for developing a more suitable synchronization method.
Applied Electronics ( …, 2010
... Aitor Morillo1, Armando Astarloa2, Jesús Lázaro3, Unai Bidarte4, Jaime Jimenez5 Escuela Técni... more ... Aitor Morillo1, Armando Astarloa2, Jesús Lázaro3, Unai Bidarte4, Jaime Jimenez5 Escuela Técnica Superior de Ingeniería de Bilbao Alameda Urquijo s/n 48013 - Bilbao 1aitor.morillo@ ehu.es 2armando.astarloa@ehu.es 3jesus.lazaro@ehu.es 4unai.bidarte@ehu.es 5jaime ...
2011 VII Southern Conference on Programmable Logic (SPL), 2011
... Aitor Morillo, Armando Astarloa, Jesús Lázaro, Unai Bidarte and Jaime Jimenez ... Supplementa... more ... Aitor Morillo, Armando Astarloa, Jesús Lázaro, Unai Bidarte and Jaime Jimenez ... Supplementary to the soft small processor they add additional specific hard-ware logic depending on the application and a standard in-terface for connecting them to a communication bus. ...
... Aitor Morillo1, Armando Astarloa2, Jesús Lázaro3, Unai Bidarte4, Jaime Jimenez5 Escuela Técni... more ... Aitor Morillo1, Armando Astarloa2, Jesús Lázaro3, Unai Bidarte4, Jaime Jimenez5 Escuela Técnica Superior de Ingeniería de Bilbao Alameda Urquijo s/n 48013 - Bilbao 1aitor.morillo@ ehu.es 2armando.astarloa@ehu.es 3jesus.lazaro@ehu.es 4unai.bidarte@ehu.es 5jaime ...