Alessandro Bardine - Academia.edu (original) (raw)

Alessandro Bardine

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Papers by Alessandro Bardine

Research paper thumbnail of Analysis of static and dynamic energy consumption in NUCA caches

Proceedings of the 2007 workshop on MEmory performance: DEaling with Applications, systems and architecture, 2007

Research paper thumbnail of D8.5 Training and Dissemination Activities Report

Research paper thumbnail of A power-efficient migration mechanism for D-NUCA caches

2009 Design, Automation & Test in Europe Conference & Exhibition, 2009

Research paper thumbnail of NUMA Caches

Encyclopedia of Parallel Computing, 2011

Research paper thumbnail of Impact of on-chip network parameters on NUCA cache performances

IET Computers & Digital Techniques, 2009

Research paper thumbnail of Evaluation of Leakage Reduction Alternatives for Deep Submicron Dynamic Nonuniform Cache Architecture Caches

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014

Research paper thumbnail of Implementation Issues of Way Adaptable D-NUCA Caches

ABSTRACT In a Way Adaptable D-NUCA cache the number of active ways is dynamically varied, accordi... more ABSTRACT In a Way Adaptable D-NUCA cache the number of active ways is dynamically varied, according to the needs of the running application, resulting in a reduction of the static power consumption without affecting performance. Because of the need of constraining the power consumption when powering up of a way, in an actual implementation of a Way Adaptable D-NUCA cache, the new way becomes available with some delay with respect to the instant in which it is needed by the application. In this work we evaluate how such a delay impact on the performance and on the effectiveness of the Way Adapting technique.

Research paper thumbnail of Energy Behaviour of NUCA Caches in CMPs

2011 14th Euromicro Conference on Digital System Design, 2011

Research paper thumbnail of Analysis of static and dynamic energy consumption in NUCA caches

Proceedings of the 2007 workshop on MEmory performance: DEaling with Applications, systems and architecture, 2007

Research paper thumbnail of D8.5 Training and Dissemination Activities Report

Research paper thumbnail of A power-efficient migration mechanism for D-NUCA caches

2009 Design, Automation & Test in Europe Conference & Exhibition, 2009

Research paper thumbnail of NUMA Caches

Encyclopedia of Parallel Computing, 2011

Research paper thumbnail of Impact of on-chip network parameters on NUCA cache performances

IET Computers & Digital Techniques, 2009

Research paper thumbnail of Evaluation of Leakage Reduction Alternatives for Deep Submicron Dynamic Nonuniform Cache Architecture Caches

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014

Research paper thumbnail of Implementation Issues of Way Adaptable D-NUCA Caches

ABSTRACT In a Way Adaptable D-NUCA cache the number of active ways is dynamically varied, accordi... more ABSTRACT In a Way Adaptable D-NUCA cache the number of active ways is dynamically varied, according to the needs of the running application, resulting in a reduction of the static power consumption without affecting performance. Because of the need of constraining the power consumption when powering up of a way, in an actual implementation of a Way Adaptable D-NUCA cache, the new way becomes available with some delay with respect to the instant in which it is needed by the application. In this work we evaluate how such a delay impact on the performance and on the effectiveness of the Way Adapting technique.

Research paper thumbnail of Energy Behaviour of NUCA Caches in CMPs

2011 14th Euromicro Conference on Digital System Design, 2011

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