C. Selvakumar - Academia.edu (original) (raw)

Papers by C. Selvakumar

—We report the results of fabricating low cut-in voltage, n +-n iso-type diodes using in situ pho... more —We report the results of fabricating low cut-in voltage, n +-n iso-type diodes using in situ phosphorus-doped polysilicon films on n-type Si substrates. The electrical characteristics of these structures show exponential current–voltage (I0V) behavior. The temperature dependence of the current is used to extract the energy barrier at the film-substrate interface. The formation of the energy barrier is assumed to be due to the presence of energy states at the polysilicon-substrate interface. A simple phenomenological model, which takes into account the interface charge, is presented to explain the formation of the energy barrier. An energy barrier height of about 0.18 eV is extracted from the results of I0V characteristics at different ambient temperatures.

We report the first n-SiGe-channel MOSFET's fabricated using high-dose germanium implantation and... more We report the first n-SiGe-channel MOSFET's fabricated using high-dose germanium implantation and solid-phase epitaxy. The new polysilicon-gate n-SiGe-channel MOSFET's were fabricated in the same chip in which conventional polysili-con-gate n-MOSFET's were made and their electrical characteristics are compared. The SiGe-channel MOSFET's show some significantly better electrical characteristics as compared to the silicon-channel MOSFET's. For example, the SiGe MOSFET's show higher drain conductance in the triode region and higher transconductance overall. The threshold voltage of the SiGe MOSFET appears to be smaller and the carrier mobility in the channel appears to be higher.

The effects of N2 addition on the etch rate of bulk-silicon and silicon-on-insulator (SOI) separa... more The effects of N2 addition on the etch rate of bulk-silicon and silicon-on-insulator (SOI) separation by implantation of oxygen (SIMOX) and zone melting recrystallization (ZMR) samples using CF4 + O2 and SF6 + O2 plasmas; as well as the damage assessment of the SF~ + O2 plasma are reported. In SF~ + 02 plasma, the N2 additive reduces the etch rate of the masking oxide [chemical vapor deposited (CVD)] while significantly increasing the silicon etch rate and, thus, increasing the selectivity by 44-64 %. In CF4 + O2 plasma, the silicon etch rate is increased due to the N2 addition. However, the increase in selectivity is about 16-45%. The etch rate of SOI silicon especially in SF6 + O2 plasma is higher than that of bulk-silicon samples. The higher etch rate of SOI samples appears related to the higher defect density of the SOI silicon. The damage assessment studied through Schottky diode and metal oxide semiconductor (MOS) capacitor samples indicates that SF6 + O1 plasma with N2 additive introduces less damage as compared to without N2 additive. Furthermore, postmetal annealing at 250~ for 15 rain in N2 + H2 ambient improves the characteristics of both Schottky diode and MOS capacitor devices. Thus the addition of N2 improves the etch rate, and selectivity in some cases, and at the same time decreases the damage. Silicon-on-insulator (SOI) material has a great potential for high speed, high voltage, smart power, and sensor applications as well as radiation hard and high temperature applications. ~-3 Recently, it was demonstrated 4 that high gain vertical polysilicon emitter transistors can be made on ZMR-SOI material. To realize integrated circuits using these polysilicon emitter transistors and other devices within insulated tubs, area-efficient shallow or moderately deep trenches are required for electrical isolation. Several isolation techniques 1 such as LOCOS, mesa, and trench structures, have been utilized to isolate individual devices made on SOI material. LOCOS is a simple and well-established process but it does not take full advantage of possible reduction and savings in both silicon and isolation areas. Moreover, LOCOS does not result in the most useful radiation-hard structures since the LOCOS process leaves larger thin film silicon areas unutilized than those of mesa and trench structures. Anisotropic wet etches may be used to create mesa isolation with precise etching time control so as to not overetch the thin silicon film on top of the buried oxide. Trench isolation provides higher packing density, smaller circuit delays, and tolerates larger variation in SOI silicon film thicknesses. Etch rates, selectivity, and the extent of reactive ion etching (RIE) damage may be significantly different for SOI silicon from that of bulk-St, primarily stemming from the differences in the material propertiesY We have undertaken a study to characterize the etch rates of ZMR, SIMOX, and bulk-St in CF4 + O1 and SF~ + O2 plasmas against several process variables as well as to assess the damage of SF6 + O2 plasma with and without N2 additive. Compared with CF4 + O1 plasma, 9 SF6 + O2 plasma has a much larger concentration of atomic fluorine which in turn gives rise to a higher silicon etch rate.l~ A prime goal in this study is to evaluate th_e effect of N~ additive in two different plasma systems studied, namely, CF4 + O2 and SF6 + O2 and to assess the resulting damage from SF6 + O1 plasma. This work is part of our effort to develop an SOI bipolar integrated circuit process. Recently, Premachandran 1~-12 has shown that an addition of 1% N2 into plasma gives rise to a threefold increase in the etch rate of silicon in CF4 + O2 plasma 1~ and a seven fold increase in the atomic fluorine concentration in SF6 + O2 + N2 plasma which in turn enhances the silicon etch rate.l"~ He has postulated that the increase in the atomic fluorine concentration is responsible for the increased etch rate. In reactive ion etching, by the self-bias voltage reactive ions are accelerated and are bombarded on the wafer surface. This ion-enhanced etching process can cause surface charging effects which can limit the control on the etch profiles. 13 Surface charging also can occur if a nonuniform plasma or an unstable plasma is present during etching. ~4 Plasma instability or plasma nonuniformity produces electron and ion currents that do not balance locally and can generate surface charging effects. 1~ Plasma inconsistencies can be caused by poor electrode design, or poor choice of process conditions (e.g. gas mixtures, flow, and pressures). ~4 Though SF6 is a highly electronegative gas for silicon etching , process modifications such as nitrogen addition can modify its damage effects (possibly change the electronega-tivity effects or alter the sheath potential during discharge) and at the same time improve the etch rate and selectivity. C12 is another alternative but it is highly corrosive and environmentally unfriendly. RIE-induced surface charging may affect the semicon-ductor/devices in various ways, ~6 such as a reduction in the minority carrier lifetime, ~6 an increase in junction leakage current, 17 a reduction of Schottky barrier height, 17 and increase in interface density, (Dit) ~8 and creation of lattice damage. ~9 Schottky diodes and MOS capacitors were used as test vehicles to assess the damage due to SF6 + O2 RIE process. Post metal annealing at 250~ in N~ + H2 ambient improved the characteristics of the Schottky diodes and MOS capacitors. We report here our findings related to the effects of N2 additive to the etch rates of Si in CF4 + 02 and SF6 + 02 plasmas as well as damage assessment of SF6 + 02 plasma with and without N2 additive. Attempts to reduce the damage also are reported. The Si etch rates are studied for bulk-Si and Si epi layer of SOI (SIMOX and ZMR) wafers. We found that the use of SF6 + O2 plasma gives rise to higher

A simple analytical model for ion-solid interactions, suitable for low energy beam depositions, i... more A simple analytical model for ion-solid interactions, suitable for low energy beam depositions, is reported. An approximation for the nuclear stopping power is used to obtain the analytic solution for the deposited energy in the solid. The ratio of the deposited energy in the bulk to the energy deposited in the surface yields a ceiling for the beam energy above which more defects are generated in the bulk resulting in defective films. The numerical evaluations agree with the existing results in the literature.

—An iteration scheme to calculate the base transit time () for a given collector current density ... more —An iteration scheme to calculate the base transit time () for a given collector current density is developed in order to determine the optimal doping profile and Ge profile in the neutral base for minimizing the of SiGe HBTs under all levels of injection before the onset of the Kirk effect. We adopt a consistent set of SiGe transport parameters, tuned to measurement data, and include important effects such as the electric-field dependency of the diffusion coefficient and plasma-induced bandgap narrowing in our study. The scheme has been verified with simulation results reported in the literature. Our study shows that under both low and high injection, for a given Ge dose, intrinsic base resistance, and base concentration near the emitter, a retrograde doping profile with a trapezoidal Ge profile gives the minimum .

Using the raw experimental data of Schmid and the known values of band-gap narrowing and Fermi en... more Using the raw experimental data of Schmid and the known values of band-gap narrowing and Fermi energies for different doping concentrations, the band-to-band and free-carrier absorption coefficients in heavily doped Si are calculated. The behavior of boron-doped Si is different from that of arsenic doped Si. Near threshold, our values of the absorption coefficients are significantly different from those derived by Schmid from the same data. The enhancement of band-to-band transitions due to impurity or free-carrier scattering is not as important in heavily doped Si as in heavily doped Ge. Numerically fitted empirical expressions for the absorption coefficients, suitable for computer simulation studies of opto-electronic devices are given.

An ac voltage regulator capable of operating from the mains with excellent regulation and conside... more An ac voltage regulator capable of operating from the mains with excellent regulation and considerable power-handling capacity is achieved by means of a negative-feedback configuration that aims at high efficiency. Practical efficiencies as high as 95 percent and regulation as low as 0.02 percent are easily achieved with a little extra circuitry. To illustrate the scheme, a model ac regulator was built to deliver 90-W output power in a 137-Q resistive load at VO = 111 V rms at 50 Hz from an input source fluctuating between Vin = 115 to 140 V rms. The overall efficiency when the input is at the lower limit is 96.5 percent and the efficiency drops to 79.3 percent when the input is on the higher limit giving an average efficiency of 88 percent. The output voltage varies only by 0.1 V rms for a 25-V input fluctuation thus giving a regulation of 0.4 percent. In addition to the many applications as voltage stabilizers in television sets, refrigerators , and small motors, etc., this scheme is most suited as a general control element in hiany systems as temperature controller and speed controller, etc.

We report the first n-SiGe-channel MOSFET's fabricated using high-dose germanium implantation and... more We report the first n-SiGe-channel MOSFET's fabricated using high-dose germanium implantation and solid-phase epitaxy. The new polysilicon-gate n-SiGe-channel MOSFET's were fabricated in the same chip in which conventional polysili-con-gate n-MOSFET's were made and their electrical characteristics are compared. The SiGe-channel MOSFET's show some significantly better electrical characteristics as compared to the silicon-channel MOSFET's. For example, the SiGe MOSFET's show higher drain conductance in the triode region and higher transconductance overall. The threshold voltage of the SiGe MOSFET appears to be smaller and the carrier mobility in the channel appears to be higher.

A simple analytical model for ion-solid interactions, suitable for low energy beam depositions, i... more A simple analytical model for ion-solid interactions, suitable for low energy beam depositions, is reported. An approximation for the nuclear stopping power is used to obtain the analytic solution for the deposited energy in the solid. The ratio of the deposited energy in the bulk to the energy deposited in the surface yields a ceiling for the beam energy above which more defects are generated in the bulk resulting in defective films. The numerical evaluations agree with the existing results in the literature.

—An iteration scheme to calculate the base transit time () for a given collector current density ... more —An iteration scheme to calculate the base transit time () for a given collector current density is developed in order to determine the optimal doping profile and Ge profile in the neutral base for minimizing the of SiGe HBTs under all levels of injection before the onset of the Kirk effect. We adopt a consistent set of SiGe transport parameters, tuned to measurement data, and include important effects such as the electric-field dependency of the diffusion coefficient and plasma-induced bandgap narrowing in our study. The scheme has been verified with simulation results reported in the literature. Our study shows that under both low and high injection, for a given Ge dose, intrinsic base resistance, and base concentration near the emitter, a retrograde doping profile with a trapezoidal Ge profile gives the minimum .

—We report the results of fabricating low cut-in voltage, n +-n iso-type diodes using in situ pho... more —We report the results of fabricating low cut-in voltage, n +-n iso-type diodes using in situ phosphorus-doped polysilicon films on n-type Si substrates. The electrical characteristics of these structures show exponential current–voltage (I0V) behavior. The temperature dependence of the current is used to extract the energy barrier at the film-substrate interface. The formation of the energy barrier is assumed to be due to the presence of energy states at the polysilicon-substrate interface. A simple phenomenological model, which takes into account the interface charge, is presented to explain the formation of the energy barrier. An energy barrier height of about 0.18 eV is extracted from the results of I0V characteristics at different ambient temperatures.

We present a physical model to study the interface states in p-n heterostructures at different am... more We present a physical model to study the interface states in p-n heterostructures at different ambient temperatures. Field-assisted emission of such states is considered as the source for the linear increase in charge concentration at the p-n interface with the applied reverse voltage. The high frequency capacitance-voltage technique is used to study the charging and discharging of interface states in an MBE-made sample at different temperatures and diierent biases. The experimental results show good agreement with the prediction of our model. 0 1995 American Institute of Physics.

The effects of N2 addition on the etch rate of bulk-silicon and silicon-on-insulator (SOI) separa... more The effects of N2 addition on the etch rate of bulk-silicon and silicon-on-insulator (SOI) separation by implantation of oxygen (SIMOX) and zone melting recrystallization (ZMR) samples using CF4 + O2 and SF6 + O2 plasmas; as well as the damage assessment of the SF~ + O2 plasma are reported. In SF~ + 02 plasma, the N2 additive reduces the etch rate of the masking oxide [chemical vapor deposited (CVD)] while significantly increasing the silicon etch rate and, thus, increasing the selectivity by 44-64 %. In CF4 + O2 plasma, the silicon etch rate is increased due to the N2 addition. However, the increase in selectivity is about 16-45%. The etch rate of SOI silicon especially in SF6 + O2 plasma is higher than that of bulk-silicon samples. The higher etch rate of SOI samples appears related to the higher defect density of the SOI silicon. The damage assessment studied through Schottky diode and metal oxide semiconductor (MOS) capacitor samples indicates that SF6 + O1 plasma with N2 additive introduces less damage as compared to without N2 additive. Furthermore, postmetal annealing at 250~ for 15 rain in N2 + H2 ambient improves the characteristics of both Schottky diode and MOS capacitor devices. Thus the addition of N2 improves the etch rate, and selectivity in some cases, and at the same time decreases the damage. Silicon-on-insulator (SOI) material has a great potential for high speed, high voltage, smart power, and sensor applications as well as radiation hard and high temperature applications. ~-3 Recently, it was demonstrated 4 that high gain vertical polysilicon emitter transistors can be made on ZMR-SOI material. To realize integrated circuits using these polysilicon emitter transistors and other devices within insulated tubs, area-efficient shallow or moderately deep trenches are required for electrical isolation. Several isolation techniques 1 such as LOCOS, mesa, and trench structures, have been utilized to isolate individual devices made on SOI material. LOCOS is a simple and well-established process but it does not take full advantage of possible reduction and savings in both silicon and isolation areas. Moreover, LOCOS does not result in the most useful radiation-hard structures since the LOCOS process leaves larger thin film silicon areas unutilized than those of mesa and trench structures. Anisotropic wet etches may be used to create mesa isolation with precise etching time control so as to not overetch the thin silicon film on top of the buried oxide. Trench isolation provides higher packing density, smaller circuit delays, and tolerates larger variation in SOI silicon film thicknesses. Etch rates, selectivity, and the extent of reactive ion etching (RIE) damage may be significantly different for SOI silicon from that of bulk-St, primarily stemming from the differences in the material propertiesY We have undertaken a study to characterize the etch rates of ZMR, SIMOX, and bulk-St in CF4 + O1 and SF~ + O2 plasmas against several process variables as well as to assess the damage of SF6 + O2 plasma with and without N2 additive. Compared with CF4 + O1 plasma, 9 SF6 + O2 plasma has a much larger concentration of atomic fluorine which in turn gives rise to a higher silicon etch rate.l~ A prime goal in this study is to evaluate th_e effect of N~ additive in two different plasma systems studied, namely, CF4 + O2 and SF6 + O2 and to assess the resulting damage from SF6 + O1 plasma. This work is part of our effort to develop an SOI bipolar integrated circuit process. Recently, Premachandran 1~-12 has shown that an addition of 1% N2 into plasma gives rise to a threefold increase in the etch rate of silicon in CF4 + O2 plasma 1~ and a seven fold increase in the atomic fluorine concentration in SF6 + O2 + N2 plasma which in turn enhances the silicon etch rate.l"~ He has postulated that the increase in the atomic fluorine concentration is responsible for the increased etch rate. In reactive ion etching, by the self-bias voltage reactive ions are accelerated and are bombarded on the wafer surface. This ion-enhanced etching process can cause surface charging effects which can limit the control on the etch profiles. 13 Surface charging also can occur if a nonuniform plasma or an unstable plasma is present during etching. ~4 Plasma instability or plasma nonuniformity produces electron and ion currents that do not balance locally and can generate surface charging effects. 1~ Plasma inconsistencies can be caused by poor electrode design, or poor choice of process conditions (e.g. gas mixtures, flow, and pressures). ~4 Though SF6 is a highly electronegative gas for silicon etching , process modifications such as nitrogen addition can modify its damage effects (possibly change the electronega-tivity effects or alter the sheath potential during discharge) and at the same time improve the etch rate and selectivity. C12 is another alternative but it is highly corrosive and environmentally unfriendly. RIE-induced surface charging may affect the semicon-ductor/devices in various ways, ~6 such as a reduction in the minority carrier lifetime, ~6 an increase in junction leakage current, 17 a reduction of Schottky barrier height, 17 and increase in interface density, (Dit) ~8 and creation of lattice damage. ~9 Schottky diodes and MOS capacitors were used as test vehicles to assess the damage due to SF6 + O2 RIE process. Post metal annealing at 250~ in N~ + H2 ambient improved the characteristics of the Schottky diodes and MOS capacitors. We report here our findings related to the effects of N2 additive to the etch rates of Si in CF4 + 02 and SF6 + 02 plasmas as well as damage assessment of SF6 + 02 plasma with and without N2 additive. Attempts to reduce the damage also are reported. The Si etch rates are studied for bulk-Si and Si epi layer of SOI (SIMOX and ZMR) wafers. We found that the use of SF6 + O2 plasma gives rise to higher

A simple analytical model for ion-solid interactions, suitable for low energy beam depositions, i... more A simple analytical model for ion-solid interactions, suitable for low energy beam depositions, is reported. An approximation for the nuclear stopping power is used to obtain the analytic solution for the deposited energy in the solid. The ratio of the deposited energy in the bulk to the energy deposited in the surface yields a ceiling for the beam energy above which more defects are generated in the bulk resulting in defective films. The numerical evaluations agree with the existing results in the literature.

We report the first n-SiGe-channel MOSFET's fabricated using high-dose germanium implantation and... more We report the first n-SiGe-channel MOSFET's fabricated using high-dose germanium implantation and solid-phase epitaxy. The new polysilicon-gate n-SiGe-channel MOSFET's were fabricated in the same chip in which conventional polysili-con-gate n-MOSFET's were made and their electrical characteristics are compared. The SiGe-channel MOSFET's show some significantly better electrical characteristics as compared to the silicon-channel MOSFET's. For example, the SiGe MOSFET's show higher drain conductance in the triode region and higher transconductance overall. The threshold voltage of the SiGe MOSFET appears to be smaller and the carrier mobility in the channel appears to be higher.

Journal of Applied Physics, 1984

Page 1. Simple general analytical solution to the minority carrier transport In heavily CR Seivak... more Page 1. Simple general analytical solution to the minority carrier transport In heavily CR Seivakumar8' Department of Electrical Engineering, Indian Institute of Technology, Madras 600 036, India (Received Î5 March 1984; accepted ...

Industrial Electronics and Control …, 1981

Abstract-An ac voltage regulator capable of operating from the mains with excellent regulation an... more Abstract-An ac voltage regulator capable of operating from the mains with excellent regulation and considerable power-handling capacity is achieved by means of a negative-feedback configuration that aims at highefficiency. Practical efficiencies as high as 95 percent and regulation as ...

Proceedings of the IEEE, 2000

Abafmcr-A simple t w e t e r m approximation that is accurate over I wide nnge of drive-in ratios... more Abafmcr-A simple t w e t e r m approximation that is accurate over I wide nnge of drive-in ratios is given for the two-step diffusion process.

—We report the results of fabricating low cut-in voltage, n +-n iso-type diodes using in situ pho... more —We report the results of fabricating low cut-in voltage, n +-n iso-type diodes using in situ phosphorus-doped polysilicon films on n-type Si substrates. The electrical characteristics of these structures show exponential current–voltage (I0V) behavior. The temperature dependence of the current is used to extract the energy barrier at the film-substrate interface. The formation of the energy barrier is assumed to be due to the presence of energy states at the polysilicon-substrate interface. A simple phenomenological model, which takes into account the interface charge, is presented to explain the formation of the energy barrier. An energy barrier height of about 0.18 eV is extracted from the results of I0V characteristics at different ambient temperatures.

We report the first n-SiGe-channel MOSFET's fabricated using high-dose germanium implantation and... more We report the first n-SiGe-channel MOSFET's fabricated using high-dose germanium implantation and solid-phase epitaxy. The new polysilicon-gate n-SiGe-channel MOSFET's were fabricated in the same chip in which conventional polysili-con-gate n-MOSFET's were made and their electrical characteristics are compared. The SiGe-channel MOSFET's show some significantly better electrical characteristics as compared to the silicon-channel MOSFET's. For example, the SiGe MOSFET's show higher drain conductance in the triode region and higher transconductance overall. The threshold voltage of the SiGe MOSFET appears to be smaller and the carrier mobility in the channel appears to be higher.

The effects of N2 addition on the etch rate of bulk-silicon and silicon-on-insulator (SOI) separa... more The effects of N2 addition on the etch rate of bulk-silicon and silicon-on-insulator (SOI) separation by implantation of oxygen (SIMOX) and zone melting recrystallization (ZMR) samples using CF4 + O2 and SF6 + O2 plasmas; as well as the damage assessment of the SF~ + O2 plasma are reported. In SF~ + 02 plasma, the N2 additive reduces the etch rate of the masking oxide [chemical vapor deposited (CVD)] while significantly increasing the silicon etch rate and, thus, increasing the selectivity by 44-64 %. In CF4 + O2 plasma, the silicon etch rate is increased due to the N2 addition. However, the increase in selectivity is about 16-45%. The etch rate of SOI silicon especially in SF6 + O2 plasma is higher than that of bulk-silicon samples. The higher etch rate of SOI samples appears related to the higher defect density of the SOI silicon. The damage assessment studied through Schottky diode and metal oxide semiconductor (MOS) capacitor samples indicates that SF6 + O1 plasma with N2 additive introduces less damage as compared to without N2 additive. Furthermore, postmetal annealing at 250~ for 15 rain in N2 + H2 ambient improves the characteristics of both Schottky diode and MOS capacitor devices. Thus the addition of N2 improves the etch rate, and selectivity in some cases, and at the same time decreases the damage. Silicon-on-insulator (SOI) material has a great potential for high speed, high voltage, smart power, and sensor applications as well as radiation hard and high temperature applications. ~-3 Recently, it was demonstrated 4 that high gain vertical polysilicon emitter transistors can be made on ZMR-SOI material. To realize integrated circuits using these polysilicon emitter transistors and other devices within insulated tubs, area-efficient shallow or moderately deep trenches are required for electrical isolation. Several isolation techniques 1 such as LOCOS, mesa, and trench structures, have been utilized to isolate individual devices made on SOI material. LOCOS is a simple and well-established process but it does not take full advantage of possible reduction and savings in both silicon and isolation areas. Moreover, LOCOS does not result in the most useful radiation-hard structures since the LOCOS process leaves larger thin film silicon areas unutilized than those of mesa and trench structures. Anisotropic wet etches may be used to create mesa isolation with precise etching time control so as to not overetch the thin silicon film on top of the buried oxide. Trench isolation provides higher packing density, smaller circuit delays, and tolerates larger variation in SOI silicon film thicknesses. Etch rates, selectivity, and the extent of reactive ion etching (RIE) damage may be significantly different for SOI silicon from that of bulk-St, primarily stemming from the differences in the material propertiesY We have undertaken a study to characterize the etch rates of ZMR, SIMOX, and bulk-St in CF4 + O1 and SF~ + O2 plasmas against several process variables as well as to assess the damage of SF6 + O2 plasma with and without N2 additive. Compared with CF4 + O1 plasma, 9 SF6 + O2 plasma has a much larger concentration of atomic fluorine which in turn gives rise to a higher silicon etch rate.l~ A prime goal in this study is to evaluate th_e effect of N~ additive in two different plasma systems studied, namely, CF4 + O2 and SF6 + O2 and to assess the resulting damage from SF6 + O1 plasma. This work is part of our effort to develop an SOI bipolar integrated circuit process. Recently, Premachandran 1~-12 has shown that an addition of 1% N2 into plasma gives rise to a threefold increase in the etch rate of silicon in CF4 + O2 plasma 1~ and a seven fold increase in the atomic fluorine concentration in SF6 + O2 + N2 plasma which in turn enhances the silicon etch rate.l"~ He has postulated that the increase in the atomic fluorine concentration is responsible for the increased etch rate. In reactive ion etching, by the self-bias voltage reactive ions are accelerated and are bombarded on the wafer surface. This ion-enhanced etching process can cause surface charging effects which can limit the control on the etch profiles. 13 Surface charging also can occur if a nonuniform plasma or an unstable plasma is present during etching. ~4 Plasma instability or plasma nonuniformity produces electron and ion currents that do not balance locally and can generate surface charging effects. 1~ Plasma inconsistencies can be caused by poor electrode design, or poor choice of process conditions (e.g. gas mixtures, flow, and pressures). ~4 Though SF6 is a highly electronegative gas for silicon etching , process modifications such as nitrogen addition can modify its damage effects (possibly change the electronega-tivity effects or alter the sheath potential during discharge) and at the same time improve the etch rate and selectivity. C12 is another alternative but it is highly corrosive and environmentally unfriendly. RIE-induced surface charging may affect the semicon-ductor/devices in various ways, ~6 such as a reduction in the minority carrier lifetime, ~6 an increase in junction leakage current, 17 a reduction of Schottky barrier height, 17 and increase in interface density, (Dit) ~8 and creation of lattice damage. ~9 Schottky diodes and MOS capacitors were used as test vehicles to assess the damage due to SF6 + O2 RIE process. Post metal annealing at 250~ in N~ + H2 ambient improved the characteristics of the Schottky diodes and MOS capacitors. We report here our findings related to the effects of N2 additive to the etch rates of Si in CF4 + 02 and SF6 + 02 plasmas as well as damage assessment of SF6 + 02 plasma with and without N2 additive. Attempts to reduce the damage also are reported. The Si etch rates are studied for bulk-Si and Si epi layer of SOI (SIMOX and ZMR) wafers. We found that the use of SF6 + O2 plasma gives rise to higher

A simple analytical model for ion-solid interactions, suitable for low energy beam depositions, i... more A simple analytical model for ion-solid interactions, suitable for low energy beam depositions, is reported. An approximation for the nuclear stopping power is used to obtain the analytic solution for the deposited energy in the solid. The ratio of the deposited energy in the bulk to the energy deposited in the surface yields a ceiling for the beam energy above which more defects are generated in the bulk resulting in defective films. The numerical evaluations agree with the existing results in the literature.

—An iteration scheme to calculate the base transit time () for a given collector current density ... more —An iteration scheme to calculate the base transit time () for a given collector current density is developed in order to determine the optimal doping profile and Ge profile in the neutral base for minimizing the of SiGe HBTs under all levels of injection before the onset of the Kirk effect. We adopt a consistent set of SiGe transport parameters, tuned to measurement data, and include important effects such as the electric-field dependency of the diffusion coefficient and plasma-induced bandgap narrowing in our study. The scheme has been verified with simulation results reported in the literature. Our study shows that under both low and high injection, for a given Ge dose, intrinsic base resistance, and base concentration near the emitter, a retrograde doping profile with a trapezoidal Ge profile gives the minimum .

Using the raw experimental data of Schmid and the known values of band-gap narrowing and Fermi en... more Using the raw experimental data of Schmid and the known values of band-gap narrowing and Fermi energies for different doping concentrations, the band-to-band and free-carrier absorption coefficients in heavily doped Si are calculated. The behavior of boron-doped Si is different from that of arsenic doped Si. Near threshold, our values of the absorption coefficients are significantly different from those derived by Schmid from the same data. The enhancement of band-to-band transitions due to impurity or free-carrier scattering is not as important in heavily doped Si as in heavily doped Ge. Numerically fitted empirical expressions for the absorption coefficients, suitable for computer simulation studies of opto-electronic devices are given.

An ac voltage regulator capable of operating from the mains with excellent regulation and conside... more An ac voltage regulator capable of operating from the mains with excellent regulation and considerable power-handling capacity is achieved by means of a negative-feedback configuration that aims at high efficiency. Practical efficiencies as high as 95 percent and regulation as low as 0.02 percent are easily achieved with a little extra circuitry. To illustrate the scheme, a model ac regulator was built to deliver 90-W output power in a 137-Q resistive load at VO = 111 V rms at 50 Hz from an input source fluctuating between Vin = 115 to 140 V rms. The overall efficiency when the input is at the lower limit is 96.5 percent and the efficiency drops to 79.3 percent when the input is on the higher limit giving an average efficiency of 88 percent. The output voltage varies only by 0.1 V rms for a 25-V input fluctuation thus giving a regulation of 0.4 percent. In addition to the many applications as voltage stabilizers in television sets, refrigerators , and small motors, etc., this scheme is most suited as a general control element in hiany systems as temperature controller and speed controller, etc.

We report the first n-SiGe-channel MOSFET's fabricated using high-dose germanium implantation and... more We report the first n-SiGe-channel MOSFET's fabricated using high-dose germanium implantation and solid-phase epitaxy. The new polysilicon-gate n-SiGe-channel MOSFET's were fabricated in the same chip in which conventional polysili-con-gate n-MOSFET's were made and their electrical characteristics are compared. The SiGe-channel MOSFET's show some significantly better electrical characteristics as compared to the silicon-channel MOSFET's. For example, the SiGe MOSFET's show higher drain conductance in the triode region and higher transconductance overall. The threshold voltage of the SiGe MOSFET appears to be smaller and the carrier mobility in the channel appears to be higher.

A simple analytical model for ion-solid interactions, suitable for low energy beam depositions, i... more A simple analytical model for ion-solid interactions, suitable for low energy beam depositions, is reported. An approximation for the nuclear stopping power is used to obtain the analytic solution for the deposited energy in the solid. The ratio of the deposited energy in the bulk to the energy deposited in the surface yields a ceiling for the beam energy above which more defects are generated in the bulk resulting in defective films. The numerical evaluations agree with the existing results in the literature.

—An iteration scheme to calculate the base transit time () for a given collector current density ... more —An iteration scheme to calculate the base transit time () for a given collector current density is developed in order to determine the optimal doping profile and Ge profile in the neutral base for minimizing the of SiGe HBTs under all levels of injection before the onset of the Kirk effect. We adopt a consistent set of SiGe transport parameters, tuned to measurement data, and include important effects such as the electric-field dependency of the diffusion coefficient and plasma-induced bandgap narrowing in our study. The scheme has been verified with simulation results reported in the literature. Our study shows that under both low and high injection, for a given Ge dose, intrinsic base resistance, and base concentration near the emitter, a retrograde doping profile with a trapezoidal Ge profile gives the minimum .

—We report the results of fabricating low cut-in voltage, n +-n iso-type diodes using in situ pho... more —We report the results of fabricating low cut-in voltage, n +-n iso-type diodes using in situ phosphorus-doped polysilicon films on n-type Si substrates. The electrical characteristics of these structures show exponential current–voltage (I0V) behavior. The temperature dependence of the current is used to extract the energy barrier at the film-substrate interface. The formation of the energy barrier is assumed to be due to the presence of energy states at the polysilicon-substrate interface. A simple phenomenological model, which takes into account the interface charge, is presented to explain the formation of the energy barrier. An energy barrier height of about 0.18 eV is extracted from the results of I0V characteristics at different ambient temperatures.

We present a physical model to study the interface states in p-n heterostructures at different am... more We present a physical model to study the interface states in p-n heterostructures at different ambient temperatures. Field-assisted emission of such states is considered as the source for the linear increase in charge concentration at the p-n interface with the applied reverse voltage. The high frequency capacitance-voltage technique is used to study the charging and discharging of interface states in an MBE-made sample at different temperatures and diierent biases. The experimental results show good agreement with the prediction of our model. 0 1995 American Institute of Physics.

The effects of N2 addition on the etch rate of bulk-silicon and silicon-on-insulator (SOI) separa... more The effects of N2 addition on the etch rate of bulk-silicon and silicon-on-insulator (SOI) separation by implantation of oxygen (SIMOX) and zone melting recrystallization (ZMR) samples using CF4 + O2 and SF6 + O2 plasmas; as well as the damage assessment of the SF~ + O2 plasma are reported. In SF~ + 02 plasma, the N2 additive reduces the etch rate of the masking oxide [chemical vapor deposited (CVD)] while significantly increasing the silicon etch rate and, thus, increasing the selectivity by 44-64 %. In CF4 + O2 plasma, the silicon etch rate is increased due to the N2 addition. However, the increase in selectivity is about 16-45%. The etch rate of SOI silicon especially in SF6 + O2 plasma is higher than that of bulk-silicon samples. The higher etch rate of SOI samples appears related to the higher defect density of the SOI silicon. The damage assessment studied through Schottky diode and metal oxide semiconductor (MOS) capacitor samples indicates that SF6 + O1 plasma with N2 additive introduces less damage as compared to without N2 additive. Furthermore, postmetal annealing at 250~ for 15 rain in N2 + H2 ambient improves the characteristics of both Schottky diode and MOS capacitor devices. Thus the addition of N2 improves the etch rate, and selectivity in some cases, and at the same time decreases the damage. Silicon-on-insulator (SOI) material has a great potential for high speed, high voltage, smart power, and sensor applications as well as radiation hard and high temperature applications. ~-3 Recently, it was demonstrated 4 that high gain vertical polysilicon emitter transistors can be made on ZMR-SOI material. To realize integrated circuits using these polysilicon emitter transistors and other devices within insulated tubs, area-efficient shallow or moderately deep trenches are required for electrical isolation. Several isolation techniques 1 such as LOCOS, mesa, and trench structures, have been utilized to isolate individual devices made on SOI material. LOCOS is a simple and well-established process but it does not take full advantage of possible reduction and savings in both silicon and isolation areas. Moreover, LOCOS does not result in the most useful radiation-hard structures since the LOCOS process leaves larger thin film silicon areas unutilized than those of mesa and trench structures. Anisotropic wet etches may be used to create mesa isolation with precise etching time control so as to not overetch the thin silicon film on top of the buried oxide. Trench isolation provides higher packing density, smaller circuit delays, and tolerates larger variation in SOI silicon film thicknesses. Etch rates, selectivity, and the extent of reactive ion etching (RIE) damage may be significantly different for SOI silicon from that of bulk-St, primarily stemming from the differences in the material propertiesY We have undertaken a study to characterize the etch rates of ZMR, SIMOX, and bulk-St in CF4 + O1 and SF~ + O2 plasmas against several process variables as well as to assess the damage of SF6 + O2 plasma with and without N2 additive. Compared with CF4 + O1 plasma, 9 SF6 + O2 plasma has a much larger concentration of atomic fluorine which in turn gives rise to a higher silicon etch rate.l~ A prime goal in this study is to evaluate th_e effect of N~ additive in two different plasma systems studied, namely, CF4 + O2 and SF6 + O2 and to assess the resulting damage from SF6 + O1 plasma. This work is part of our effort to develop an SOI bipolar integrated circuit process. Recently, Premachandran 1~-12 has shown that an addition of 1% N2 into plasma gives rise to a threefold increase in the etch rate of silicon in CF4 + O2 plasma 1~ and a seven fold increase in the atomic fluorine concentration in SF6 + O2 + N2 plasma which in turn enhances the silicon etch rate.l"~ He has postulated that the increase in the atomic fluorine concentration is responsible for the increased etch rate. In reactive ion etching, by the self-bias voltage reactive ions are accelerated and are bombarded on the wafer surface. This ion-enhanced etching process can cause surface charging effects which can limit the control on the etch profiles. 13 Surface charging also can occur if a nonuniform plasma or an unstable plasma is present during etching. ~4 Plasma instability or plasma nonuniformity produces electron and ion currents that do not balance locally and can generate surface charging effects. 1~ Plasma inconsistencies can be caused by poor electrode design, or poor choice of process conditions (e.g. gas mixtures, flow, and pressures). ~4 Though SF6 is a highly electronegative gas for silicon etching , process modifications such as nitrogen addition can modify its damage effects (possibly change the electronega-tivity effects or alter the sheath potential during discharge) and at the same time improve the etch rate and selectivity. C12 is another alternative but it is highly corrosive and environmentally unfriendly. RIE-induced surface charging may affect the semicon-ductor/devices in various ways, ~6 such as a reduction in the minority carrier lifetime, ~6 an increase in junction leakage current, 17 a reduction of Schottky barrier height, 17 and increase in interface density, (Dit) ~8 and creation of lattice damage. ~9 Schottky diodes and MOS capacitors were used as test vehicles to assess the damage due to SF6 + O2 RIE process. Post metal annealing at 250~ in N~ + H2 ambient improved the characteristics of the Schottky diodes and MOS capacitors. We report here our findings related to the effects of N2 additive to the etch rates of Si in CF4 + 02 and SF6 + 02 plasmas as well as damage assessment of SF6 + 02 plasma with and without N2 additive. Attempts to reduce the damage also are reported. The Si etch rates are studied for bulk-Si and Si epi layer of SOI (SIMOX and ZMR) wafers. We found that the use of SF6 + O2 plasma gives rise to higher

A simple analytical model for ion-solid interactions, suitable for low energy beam depositions, i... more A simple analytical model for ion-solid interactions, suitable for low energy beam depositions, is reported. An approximation for the nuclear stopping power is used to obtain the analytic solution for the deposited energy in the solid. The ratio of the deposited energy in the bulk to the energy deposited in the surface yields a ceiling for the beam energy above which more defects are generated in the bulk resulting in defective films. The numerical evaluations agree with the existing results in the literature.

We report the first n-SiGe-channel MOSFET's fabricated using high-dose germanium implantation and... more We report the first n-SiGe-channel MOSFET's fabricated using high-dose germanium implantation and solid-phase epitaxy. The new polysilicon-gate n-SiGe-channel MOSFET's were fabricated in the same chip in which conventional polysili-con-gate n-MOSFET's were made and their electrical characteristics are compared. The SiGe-channel MOSFET's show some significantly better electrical characteristics as compared to the silicon-channel MOSFET's. For example, the SiGe MOSFET's show higher drain conductance in the triode region and higher transconductance overall. The threshold voltage of the SiGe MOSFET appears to be smaller and the carrier mobility in the channel appears to be higher.

Journal of Applied Physics, 1984

Page 1. Simple general analytical solution to the minority carrier transport In heavily CR Seivak... more Page 1. Simple general analytical solution to the minority carrier transport In heavily CR Seivakumar8' Department of Electrical Engineering, Indian Institute of Technology, Madras 600 036, India (Received Î5 March 1984; accepted ...

Industrial Electronics and Control …, 1981

Abstract-An ac voltage regulator capable of operating from the mains with excellent regulation an... more Abstract-An ac voltage regulator capable of operating from the mains with excellent regulation and considerable power-handling capacity is achieved by means of a negative-feedback configuration that aims at highefficiency. Practical efficiencies as high as 95 percent and regulation as ...

Proceedings of the IEEE, 2000

Abafmcr-A simple t w e t e r m approximation that is accurate over I wide nnge of drive-in ratios... more Abafmcr-A simple t w e t e r m approximation that is accurate over I wide nnge of drive-in ratios is given for the two-step diffusion process.