Chhayadevi Bhamare - Academia.edu (original) (raw)
Papers by Chhayadevi Bhamare
In high-performance computer systems, performance losses due to conditional branch instruction ca... more In high-performance computer systems, performance losses due to conditional branch instruction can be minimized by predicting a branch outcome and fetching, decoding and/or issuing subsequent instructions before the actual outcome is known. This paper discusses various branch prediction strategies and architectures with the goal of maximizing prediction accuracy.
Abstract:-Configuration of the computing and communications systems found at home and in the work... more Abstract:-Configuration of the computing and communications systems found at home and in the workplace is a complex system design that currently requires the attention of the user. Recently, researchers have begun to explore computers that would autonomously configure their functionality based on observations of who or what is surrounding them. By determining their context, using input from sensor systems distributed throughout the environment, computing devices could personalize themselves to their current user, adapt their behaviour according to their location, or interact to their surroundings. This field of intelligence is called Ambient Intelligence (AmI). There has been increasing interest in building networks with AmI, which incorporates the user-centricity and context awareness, or in short AmI is a new information paradigm where people are empowered through a digital environment that is “aware ” of their presence, context and is sensitive, adaptive, responsive to their need...
In high-performance computer systems, performance losses due to conditional branch instruction ca... more In high-performance computer systems, performance losses due to conditional branch instruction can be minimized by predicting a branch outcome and fetching, decoding and/or issuing subsequent instructions before the actual outcome is known. This paper discusses various branch prediction strategies and architectures with the goal of maximizing prediction accuracy. Keywords—Branch, Branch Prediction, Branch Transfer Buffer , Pipelining ,Two Level Branching, Branch Penalty
RISC or Reduced Instruction Set Computer is a design architecture that focuses on simplification ... more RISC or Reduced Instruction Set Computer is a design architecture that focuses on simplification of the instruction set to achieve the goal of a simplified architecture implementation. It is characterized by certain distinguishing features such as single cycle execution time, simplified instruction set and load/store architecture. However, new generation RISC processors are modifying some of these features, while adding more attributes based on their areas of application. The current paper reviews some of the RISC architectures seen over the years and analyzes their salient features. RISC( Reduced Instruction Set Computer) was first conceptualized at the university of California, Berkely with the aim of developing a single-chip computer with a simplified instruction set, as opposed to the CISC (Complex Instruction Set Computer) architecture that was prevalent at the time. The motivation behind the development of RISC was to avoid consequences that accompanied the complex architectur...
In high-performance computer systems, performance losses due to conditional branch instruction ca... more In high-performance computer systems, performance losses due to conditional branch instruction can be minimized by predicting a branch outcome and fetching, decoding and/or issuing subsequent instructions before the actual outcome is known. This paper discusses various branch prediction strategies and architectures with the goal of maximizing prediction accuracy.
Abstract:-Configuration of the computing and communications systems found at home and in the work... more Abstract:-Configuration of the computing and communications systems found at home and in the workplace is a complex system design that currently requires the attention of the user. Recently, researchers have begun to explore computers that would autonomously configure their functionality based on observations of who or what is surrounding them. By determining their context, using input from sensor systems distributed throughout the environment, computing devices could personalize themselves to their current user, adapt their behaviour according to their location, or interact to their surroundings. This field of intelligence is called Ambient Intelligence (AmI). There has been increasing interest in building networks with AmI, which incorporates the user-centricity and context awareness, or in short AmI is a new information paradigm where people are empowered through a digital environment that is “aware ” of their presence, context and is sensitive, adaptive, responsive to their need...
In high-performance computer systems, performance losses due to conditional branch instruction ca... more In high-performance computer systems, performance losses due to conditional branch instruction can be minimized by predicting a branch outcome and fetching, decoding and/or issuing subsequent instructions before the actual outcome is known. This paper discusses various branch prediction strategies and architectures with the goal of maximizing prediction accuracy. Keywords—Branch, Branch Prediction, Branch Transfer Buffer , Pipelining ,Two Level Branching, Branch Penalty
RISC or Reduced Instruction Set Computer is a design architecture that focuses on simplification ... more RISC or Reduced Instruction Set Computer is a design architecture that focuses on simplification of the instruction set to achieve the goal of a simplified architecture implementation. It is characterized by certain distinguishing features such as single cycle execution time, simplified instruction set and load/store architecture. However, new generation RISC processors are modifying some of these features, while adding more attributes based on their areas of application. The current paper reviews some of the RISC architectures seen over the years and analyzes their salient features. RISC( Reduced Instruction Set Computer) was first conceptualized at the university of California, Berkely with the aim of developing a single-chip computer with a simplified instruction set, as opposed to the CISC (Complex Instruction Set Computer) architecture that was prevalent at the time. The motivation behind the development of RISC was to avoid consequences that accompanied the complex architectur...