Soonwan Chung - Academia.edu (original) (raw)
Papers by Soonwan Chung
IEEE Transactions on Components and Packaging Technologies, 2008
In this paper, the effects of phase change of Pb-free flip chip solders during board-level interc... more In this paper, the effects of phase change of Pb-free flip chip solders during board-level interconnect reflow are investigated using numerical technique. Most of the current Pb-free solder candidates are based on Sn and their melting temperatures are in the range of 220 C-240 C. Thus, Pb-free flip chip solders melt again during subsequent board-level interconnect (BGA) reflow cycle. Since solder volume expands as much as 4% during the phase change from solid to liquid, the volumetric expansion of solder in a predefined volume by chip, substrate, and underfill creates serious reliability issues. One issue is the shorting between neighboring flip chip interconnects by the interjected solder through underfill crack or delaminated interfaces. The authors have observed the interjection of molten solder and the interfacial failure of underfill during solder reflow process. In this paper, a flip chip package is modeled to quantify the effect of the volumetric expansion of Pb-free solder. Three possible cases are investigated. One is without existence of micro crack and the other two are with the interfacial crack between chip and underfill and the crack through the underfill. The strain energy release rate around the crack tip calculated by the modified crack closure integral method is compared with interfacial fracture toughness. Parametric studies are carried out by changing material properties of underfill and interconnect pitch. Also, the effects of solder interconnect geometry and crack length are explored. For the case with interfacial crack, the configuration of a large bulge with small pitch is preferred for the board-level interconnect, whereas a large pitch is preferred for cracks in the mid plane of the underfill. Index Terms-finite-element analysis, flip chip, parametric study, phase change, Pb-free solder, strain energy release rate. I. INTRODUCTION S INCE the Pb-based solders have many advantages in cost, wetting characteristics, and availability in various melting temperatures, they have been widely used to provide electrical interconnection in electronics packaging. However, the use of Pb-based solders is being prohibited by the environmental regulations. Therefore, many studies have been performed
Electronic Components and …, 2005
The effects of phase change (from solid to liquid) of flip chip Pb-free solders during 2 nd level... more The effects of phase change (from solid to liquid) of flip chip Pb-free solders during 2 nd level interconnect reflow are investigated. Most of the current Pb-free solder candidates are Sn based solders and their melting temperatures are similar in the range of 30 degree C. Thus, flip chip Pb-free solders are melted again during subsequent 2 nd level interconnect (BGA) reflow cycle. Like most of other metals, a solder expands its volume during the phase change as much as 4%. The volumetric expansion of solder in a confined space formed of chip, substrate, and underfill creates serious reliability issues. The issues include underfill fracture and delamination of the underfill from chip or substrate. This leads to the shorting of the neighboring flip chip interconnects by the interjected solder through the underfill crack or delaminated interfaces. Accordingly, Pb-free flip chip packages should have an additional reliability issue that is not a concern for Pb solder packages. In this paper, a typical flip chip package is modeled to quantify the impact of the volumetric expansion of Pb-free solder. Two possible cases are investigated. They are with and without existence of a micro crack between chip and underfill which lead to underfill crack and delamination, respectively. Parametric studies are carried out by changing material properties of underfill and interconnect pitch. Also, the impact of geometry of solder interconnect is explored. The volumetric expansions of Pb-free solders are experimentally quantified, and applied to the analyses.
In order to protect the electronic components of electronic devices on a printed circuit board (P... more In order to protect the electronic components of electronic devices on a printed circuit board (PCB) against electromagnetic radiation, a conductive shield-can or box is normally attached to the PCB covering the electronic components. In particular, handheld electronic devices are prone to be subjected to drop impact. This means that the products would experience a significant amount of out-of-plane deformation along the PCB, which may cause stresses eventually resulting in solder joint failures. The attached shield-can could provide additional mechanical strength and minimize the out-of-plane deformation, especially where the electronic package is located. In this study, both the dynamic responses of the PCB and the characteristic life of solder joints with different shield-can designs were investigated, which are seldom explored by other researchers. In the boardlevel drop tests, a noncontact full-field optical measurement technique, digital image correlation (DIC) with images taken by stereo-high-speed cameras, was used to obtain full-field displacement data showing the dynamic responses of the PCB during the drop impact. PCBs with a fine ball grid array (FBGA) package were prepared with various types of shield-can attached. From the experimental results the effects of different shieldcan types, varying in shape and size on the dynamic responses of the PCB, were analyzed. In addition, the number of drops to failure for each shield-can was also recorded by an event detector. Using ANSYS/LS-DYNA, an accurately validated finite element model has been developed. Then the stress analysis could be performed in order to study the failure mechanism by finding the maximum tensile stress of the solder joints during the drop impact and correlate the stress results with the characteristic life of solder joint.
IEEE Transactions on Components and Packaging Technologies, 2008
In this paper, the effects of phase change of Pb-free flip chip solders during board-level interc... more In this paper, the effects of phase change of Pb-free flip chip solders during board-level interconnect reflow are investigated using numerical technique. Most of the current Pb-free solder candidates are based on Sn and their melting temperatures are in the range of 220 C-240 C. Thus, Pb-free flip chip solders melt again during subsequent board-level interconnect (BGA) reflow cycle. Since solder volume expands as much as 4% during the phase change from solid to liquid, the volumetric expansion of solder in a predefined volume by chip, substrate, and underfill creates serious reliability issues. One issue is the shorting between neighboring flip chip interconnects by the interjected solder through underfill crack or delaminated interfaces. The authors have observed the interjection of molten solder and the interfacial failure of underfill during solder reflow process. In this paper, a flip chip package is modeled to quantify the effect of the volumetric expansion of Pb-free solder. Three possible cases are investigated. One is without existence of micro crack and the other two are with the interfacial crack between chip and underfill and the crack through the underfill. The strain energy release rate around the crack tip calculated by the modified crack closure integral method is compared with interfacial fracture toughness. Parametric studies are carried out by changing material properties of underfill and interconnect pitch. Also, the effects of solder interconnect geometry and crack length are explored. For the case with interfacial crack, the configuration of a large bulge with small pitch is preferred for the board-level interconnect, whereas a large pitch is preferred for cracks in the mid plane of the underfill. Index Terms-finite-element analysis, flip chip, parametric study, phase change, Pb-free solder, strain energy release rate. I. INTRODUCTION S INCE the Pb-based solders have many advantages in cost, wetting characteristics, and availability in various melting temperatures, they have been widely used to provide electrical interconnection in electronics packaging. However, the use of Pb-based solders is being prohibited by the environmental regulations. Therefore, many studies have been performed
Electronic Components and …, 2005
The effects of phase change (from solid to liquid) of flip chip Pb-free solders during 2 nd level... more The effects of phase change (from solid to liquid) of flip chip Pb-free solders during 2 nd level interconnect reflow are investigated. Most of the current Pb-free solder candidates are Sn based solders and their melting temperatures are similar in the range of 30 degree C. Thus, flip chip Pb-free solders are melted again during subsequent 2 nd level interconnect (BGA) reflow cycle. Like most of other metals, a solder expands its volume during the phase change as much as 4%. The volumetric expansion of solder in a confined space formed of chip, substrate, and underfill creates serious reliability issues. The issues include underfill fracture and delamination of the underfill from chip or substrate. This leads to the shorting of the neighboring flip chip interconnects by the interjected solder through the underfill crack or delaminated interfaces. Accordingly, Pb-free flip chip packages should have an additional reliability issue that is not a concern for Pb solder packages. In this paper, a typical flip chip package is modeled to quantify the impact of the volumetric expansion of Pb-free solder. Two possible cases are investigated. They are with and without existence of a micro crack between chip and underfill which lead to underfill crack and delamination, respectively. Parametric studies are carried out by changing material properties of underfill and interconnect pitch. Also, the impact of geometry of solder interconnect is explored. The volumetric expansions of Pb-free solders are experimentally quantified, and applied to the analyses.
In order to protect the electronic components of electronic devices on a printed circuit board (P... more In order to protect the electronic components of electronic devices on a printed circuit board (PCB) against electromagnetic radiation, a conductive shield-can or box is normally attached to the PCB covering the electronic components. In particular, handheld electronic devices are prone to be subjected to drop impact. This means that the products would experience a significant amount of out-of-plane deformation along the PCB, which may cause stresses eventually resulting in solder joint failures. The attached shield-can could provide additional mechanical strength and minimize the out-of-plane deformation, especially where the electronic package is located. In this study, both the dynamic responses of the PCB and the characteristic life of solder joints with different shield-can designs were investigated, which are seldom explored by other researchers. In the boardlevel drop tests, a noncontact full-field optical measurement technique, digital image correlation (DIC) with images taken by stereo-high-speed cameras, was used to obtain full-field displacement data showing the dynamic responses of the PCB during the drop impact. PCBs with a fine ball grid array (FBGA) package were prepared with various types of shield-can attached. From the experimental results the effects of different shieldcan types, varying in shape and size on the dynamic responses of the PCB, were analyzed. In addition, the number of drops to failure for each shield-can was also recorded by an event detector. Using ANSYS/LS-DYNA, an accurately validated finite element model has been developed. Then the stress analysis could be performed in order to study the failure mechanism by finding the maximum tensile stress of the solder joints during the drop impact and correlate the stress results with the characteristic life of solder joint.