Claude Colledani - Academia.edu (original) (raw)

Papers by Claude Colledani

Research paper thumbnail of Development of diamond tracking detectors for high luminosity experiments at the LHC

Research paper thumbnail of Charge sensing properties of monolithic CMOS pixel sensors fabricated in a 65 nm technology

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment

This paper covers both a report on the design as well as the early characterization of several te... more This paper covers both a report on the design as well as the early characterization of several test pixel matrices implemented in sensor prototypes named CE-65 and fabricated during the first submission of the aforementioned consortium. 2. Design overview The CE-65 detectors family was designed to explore the charge collection properties of the 65 nm TPSCo process. It consists of four different chips equipped with exactly the same readout electronics, but featuring two pixel pitches (15 and 25 μm) and various sensing node geometries. This work includes studies on two of them, called further

Research paper thumbnail of International Large Detector: Interim Design Report

The ILD detector is proposed for an electron-positron collider with collision centre-of-mass ener... more The ILD detector is proposed for an electron-positron collider with collision centre-of-mass energies from 90~\GeV~to about 1~\TeV. It has been developed over the last 10 years by an international team of scientists with the goal to design and eventually propose a fully integrated detector, primarily for the International Linear Collider, ILC. In this report the fundamental ideas and concepts behind the ILD detector are discussed and the technologies needed for the realisation of the detector are reviewed. The document starts with a short review of the science goals of the ILC, and how the goals can be achieved today with the detector technologies at hand. After a discussion of the ILC and the environment in which the experiment will take place, the detector is described in more detail, including the status of the development of the technologies foreseen for each subdetector. The integration of the different sub-systems into an integrated detector is discussed, as is the interface b...

Research paper thumbnail of The ILD detector at the ILC

The International Large Detector, ILD, is a detector concept which has been developed for the ele... more The International Large Detector, ILD, is a detector concept which has been developed for the electron-positron collider ILC. The detector has been optimized for precision physics in a range of energies between 90 GeV and 1 TeV. ILD features a high precision, large volume combined silicon and gaseous tracking system, together with a high granularity calorimeter, all inside a 3.5 T solenoidal magnetic field. The paradigm of particle flow has been the guiding principle of the design of ILD. In this document the required performance of the detector, the proposed implementation and the readiness of the different technologies needed for the implementation are discussed. This is done in the framework of the ILC collider proposal, now under consideration in Japan, and includes site specific aspects needed to build and operate the detector at the proposed ILC site in Japan.

Research paper thumbnail of Developement of a High Precision and Swift Vertex Detector based on CMOS Sensors for the International Linear Collider

CMOS sensors are being developed to equip a vertex detector offering the perfomances required for... more CMOS sensors are being developed to equip a vertex detector offering the perfomances required for the physics programme at the International Linear Collider. The progress realised from Spring 2003 to Spring 2005 is exposed in this report. It addresses the exploration of new fabrication processes, the design of fast integrated signal processing micro-circuits, the assessment and improvement of the radiation tolerance, the reduction of the power dissipation, the thinning of the sensors, the design of a light mechanical support and cooling studies. Progresses were also achieved on a detector design exploiting the features of CMOS sensors. Since several performance requirements are dictated by the beamstrahlung electron rate, the latter was revisited and assessed with improved accuracy. The constraints coming out from this study are significantly more stringent than those written in the TESLA TDR.

Research paper thumbnail of TAB Bonded SSD Module for the STAR and ALICE Trackers

A novel compact detector module has been produced by the "IReS"-"Subatech"-"Thomson-CSF-Detexis" ... more A novel compact detector module has been produced by the "IReS"-"Subatech"-"Thomson-CSF-Detexis" collaboration. It includes a Double-Sided (DS) Silicon Strip Detector (SSD) and the related Front End Electronics (FEE) located on two hybrids, one for the N side and one for the P side. Bumpless Tape Automated Bonding (TAB) is used to connect the detector to the hybrids by means of microcables with neither wirebonding nor pitch adapter. Each of the six dedicated ALICE128C FE chip [1], located on the hybrid, is TABed on identical single layer microcables, which connect its inputs to the DS SSD and its outputs to the hybrid [2]. These microcables are bent in order to fold over the two hybrids on the DS SSD. This module meets the specifications of two experiments, ALICE (A Large Ion Collider Experiment) on the LHC accelerator at CERN [3] and STAR (Solenoid Tracker At Rhic) on the RHIC accelerator at BNL (Brookhaven National Laboratory) [4]. It can be used with air cooling (STAR) as well as with water cooling (ALICE) [5]. This mechanically self-consistent FE module has been tested on the SPS beam at CERN. Preliminary results are presented.

Research paper thumbnail of Monolithic active pixel sensors for high resolution vertex detectors

A novel Monolithic Active Pixel Sensor (MAPS) for charged particle tracking is presented. The par... more A novel Monolithic Active Pixel Sensor (MAPS) for charged particle tracking is presented. The partially depleted thin epitaxial layer of a low-resistivity silicon wafer is used as a sensitive detector volume from which the charge liberated by ionising particles is collected by diffusion. The sensor is a photodiode within a special structure allowing the high detection efficiency required for tracking applications. Two prototypes have been designed and fabricated using standard 0.6 and 0.35micron CMOS processes. Results of the first prototype are presented, which is made of four arrays, each containing 64×64 pixels with a readout pitch of 20 microns in both directions. Extensive tests made with a soft X-ray source (Fe) and beams of minimum ionising particles (pions of 15 and 120 GeV/c) at CERN have demonstrated the predicted performance. The individual pixel noise of around 12 ENC leads to an extremely favourable signal to noise ratio for minimum ionising particles for which over 100...

Research paper thumbnail of Design and characterisation of a fast architecture providing zero suppressed digital output integrated in a high resolution CMOS pixel sensor for the STAR vertex detector and the EUDET beam telescope

CMOS Monolithic Active Pixel Sensors (MAPS) have demonstrated their strong potential for tracking... more CMOS Monolithic Active Pixel Sensors (MAPS) have demonstrated their strong potential for tracking devices, particularly for flavour tagging. They are foreseen to equip several vertex detectors and beam telescopes. Most applications require high read-out speed, imposing sensors to feature digital output with integrated zero suppression. The most recent development of MAPS at IPHC and IRFU addressing this issue will be reviewed. An architecture will be presented, combining a pixel array, column-level discriminators and zero suppression circuits. Each pixel features a preamplifier and a correlated double sampling (CDS) micro-circuit reducing the temporal and fixed pattern noises. The sensor is fully programmable and can be monitored. It will equip experimental apparatus starting data taking in 2009/2010.

Research paper thumbnail of The APVD readout circuit for DC-coupled silicon detectors

The APVD[1,2], an integrated circuit for the front-end electronics of DC-coupled silicon detector... more The APVD[1,2], an integrated circuit for the front-end electronics of DC-coupled silicon detectors has been developed and produced in the radiation-hard process DMILL for the CMS experiment. This paper reports very briefly on the final test results, more details will be published elsewhere. I. SUMMARY The APVD_DC contains, like other members of the APV[3] family 128 identical analogue channels, each com-posed of a low noise preamplifier, a CR-RC shaper, an analogue pipeline of 160 cells and a signal processing stage[1,2]. A current compensation circuit is added in every preamplifier to sink the leakage current coming from a DC coupled silicon detector. The circuit has been tested and measured in the presence of significant DC-currents up to 11 microampere, without deterioration of the analogue performance of the circuit like pulse shape or dynamic range. The noise increases by about 300 ENC as is shown in figure 1, small compared to the additional shot-noise. Figure 1: The measured ...

Research paper thumbnail of Recent developments and results on APV(DMILL) circuits for silicon and MSGC detectors

For the analogue read-out of the CMS tracking system several variants of the APV design have been... more For the analogue read-out of the CMS tracking system several variants of the APV design have been developed in DMILL technology: the APVD_AC and APVD_DC for AC and DC-coupled silicon detectors, respectively, and a rapid front-end amplifier with 25 ns peaking time based on a bipolar transistor for the possible use of MSGC or silicon detectors. This paper introduces these circuits developed in the DMILL technology and focuses then on experimental results obtained with prototypes on silicon and MSGC detectors in a 200 GeV pion beam.

Research paper thumbnail of A ten thousand frames per second readout MAPS for the EUDET beam telescope

Designed and manufactured in a commercial CMOS 0.35 μm OPTO process for equipping the EUDET beam ... more Designed and manufactured in a commercial CMOS 0.35 μm OPTO process for equipping the EUDET beam telescope, MIMOSA26 is the first reticule size pixel sensor with digital output and integrated zero suppression. It features a matrix of pixels with 576 rows and 1152 columns, covering an active area of ~224 mm. A single point resolution of about 4 μm was obtained with a pixel pitch of 18.4 μm. Its architecture allows a fast readout frequency of ~10 k frames/s. The paper describes the chip design, test and major characterisation outcome.

Research paper thumbnail of ILC Reference Design Report: ILC Global Design Effort and World Wide Study

Research paper thumbnail of A 128 channels analog readout chip ($APVD_{DC}$) for DC-coupled silicon detectors of the CMS tracker

The APVD_DC realised in the DMILL technology is a radiation-hard integrated circuit for front-end... more The APVD_DC realised in the DMILL technology is a radiation-hard integrated circuit for front-end readout electronics of the silicon tracker of CMS. DC-coupled silicon microstrip detectors have significant economical advantages compared to AC-coupled devices mainly due to their less complex fabrication process and better yield. The APVD_DC allows the use of DCcoupled silicon detectors with significant leakage currents as it is expected due to irradiation after several years of LHC operation. In this paper, a solution is presented with an active individual leakage current compensation technique for each input channel. The APVD_DC contains 128 identical analogue channels, each one composed of a low noise preamplifier, a CR-RC shaper, a 160 cells-deep analogue pipeline and an analogue signal processing stage. A deconvolution filter at the latest stage recuperates the initial fast response function of a silicon detector and confines it to one LHC bunch crossing. The 128 analogue channel...

Research paper thumbnail of Design and test of a CMOS low-power mixed-analog/digital ASIC for radiation detector readout front ends

Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)

A new CMOS low-power mixed A/D ASIC for radiation detector readout front ends is presented *. Fir... more A new CMOS low-power mixed A/D ASIC for radiation detector readout front ends is presented *. First, we recall the principle of radiation detection system before describing the whole architecture of the circuit. The discussion is then focused on the low-power issue. By means of an innovative 128:1 analog multiplexer, we show how we drastically reduced the mean power consumption without sacrificing constraining specifications such as the input range and the readout rate. Testing mixed A/D, but strongly analog IC is also a big issue which is addressed here. Specific built-in test analog sub-circuits have been implemented in the ASIC, along with a JTAG module used to choose the type of test to perform. This module is also used to control and tune the biasing currents of the circuit. Finally, test results are presented and show that all the specifications are satisfied.

Research paper thumbnail of Radiation hard diamond sensors for future tracking applications

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2006

Research paper thumbnail of MimoStar2 User Manual

Research paper thumbnail of Automatisation des tests électriques de compteurs à micropistes au silicium

Research paper thumbnail of IMOTEPD: a low-jitter16 channels time to digital converter based on delay locked loop for small animal PET imaging applications

Research paper thumbnail of First reticule size MAPS with digital output and integrated zero suppression for the EUDET-JRA1 beam telescope

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2010

A high resolution beam telescope, based on CMOS Monolithic Active Pixel Sensors (MAPS), is being ... more A high resolution beam telescope, based on CMOS Monolithic Active Pixel Sensors (MAPS), is being developed within the EUDET collaboration. Mimosa26 is the first pixel sensor convering an active area of ~224 mm 2 with integrated zero suppression for this telescope. A single point resolution better than 4 μm is obtained with a pixel pitch of 18.4 μm. The matrix is organised in 576 rows and 1152 columns. At the bottom of the pixel array, each column is connected to a offset compensated discriminator to perform the analogue to digital conversion. Digital data are then treated by a zero suppression circuit in order to send useful information. This architecture allows a fast readout frequency of ~10 k frames/s. The paper concentrates on the details of the chip design and its main performances.

Research paper thumbnail of First test results Of MIMOSA-26, a fast CMOS sensor with integrated zero suppression and digitized output

2009 IEEE Nuclear Science Symposium Conference Record (NSS/MIC), 2009

The MIMOSA pixel sensors developed in Strasbourg have demonstrated attractive features for the de... more The MIMOSA pixel sensors developed in Strasbourg have demonstrated attractive features for the detection of charged particles in high energy physics. So far, full-size sensors have been prototyped only with analog readout, which limits the output rate to about 1000 frames/second. The new MIMOSA 26 sensor provides a 2.2 cm 2 sensitive surface with an improved readout speed of 10,000 frames/second and data throughput compression. It incorporates pixel output discrimination for binary readout and zero suppression microcircuits at the sensor periphery to stream only fired pixel out. The sensor is back from foundry since february 2009 and has being characterized in laboratory and in test beam. The temporal noise is measured around 13-14 e − and an operation point corresponding to an efficiency of 99.5±0.1 % for a fake rate of 10 −4 per pixel can be reached at room temperature. MIMOSA 26 equips the final version of the EUDET beam telescope and prefigures the architecture of monolithic active pixel sensors (MAPS) for coming vertex detectors (STAR, CBM and ILC experiments) which have higher requirements. Developments in the architecture and technology of the sensors are ongoing and should allow to match the desired readout speed and radiation tolerance. Finally, the integration of MAPS into a micro-vertex detector is addressed. A prototype ladder equipped, on both sides, with a row of 6 MIMOSA 26-like sensors is under study, aiming for a total material budget about 0.3% X0.

Research paper thumbnail of Development of diamond tracking detectors for high luminosity experiments at the LHC

Research paper thumbnail of Charge sensing properties of monolithic CMOS pixel sensors fabricated in a 65 nm technology

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment

This paper covers both a report on the design as well as the early characterization of several te... more This paper covers both a report on the design as well as the early characterization of several test pixel matrices implemented in sensor prototypes named CE-65 and fabricated during the first submission of the aforementioned consortium. 2. Design overview The CE-65 detectors family was designed to explore the charge collection properties of the 65 nm TPSCo process. It consists of four different chips equipped with exactly the same readout electronics, but featuring two pixel pitches (15 and 25 μm) and various sensing node geometries. This work includes studies on two of them, called further

Research paper thumbnail of International Large Detector: Interim Design Report

The ILD detector is proposed for an electron-positron collider with collision centre-of-mass ener... more The ILD detector is proposed for an electron-positron collider with collision centre-of-mass energies from 90~\GeV~to about 1~\TeV. It has been developed over the last 10 years by an international team of scientists with the goal to design and eventually propose a fully integrated detector, primarily for the International Linear Collider, ILC. In this report the fundamental ideas and concepts behind the ILD detector are discussed and the technologies needed for the realisation of the detector are reviewed. The document starts with a short review of the science goals of the ILC, and how the goals can be achieved today with the detector technologies at hand. After a discussion of the ILC and the environment in which the experiment will take place, the detector is described in more detail, including the status of the development of the technologies foreseen for each subdetector. The integration of the different sub-systems into an integrated detector is discussed, as is the interface b...

Research paper thumbnail of The ILD detector at the ILC

The International Large Detector, ILD, is a detector concept which has been developed for the ele... more The International Large Detector, ILD, is a detector concept which has been developed for the electron-positron collider ILC. The detector has been optimized for precision physics in a range of energies between 90 GeV and 1 TeV. ILD features a high precision, large volume combined silicon and gaseous tracking system, together with a high granularity calorimeter, all inside a 3.5 T solenoidal magnetic field. The paradigm of particle flow has been the guiding principle of the design of ILD. In this document the required performance of the detector, the proposed implementation and the readiness of the different technologies needed for the implementation are discussed. This is done in the framework of the ILC collider proposal, now under consideration in Japan, and includes site specific aspects needed to build and operate the detector at the proposed ILC site in Japan.

Research paper thumbnail of Developement of a High Precision and Swift Vertex Detector based on CMOS Sensors for the International Linear Collider

CMOS sensors are being developed to equip a vertex detector offering the perfomances required for... more CMOS sensors are being developed to equip a vertex detector offering the perfomances required for the physics programme at the International Linear Collider. The progress realised from Spring 2003 to Spring 2005 is exposed in this report. It addresses the exploration of new fabrication processes, the design of fast integrated signal processing micro-circuits, the assessment and improvement of the radiation tolerance, the reduction of the power dissipation, the thinning of the sensors, the design of a light mechanical support and cooling studies. Progresses were also achieved on a detector design exploiting the features of CMOS sensors. Since several performance requirements are dictated by the beamstrahlung electron rate, the latter was revisited and assessed with improved accuracy. The constraints coming out from this study are significantly more stringent than those written in the TESLA TDR.

Research paper thumbnail of TAB Bonded SSD Module for the STAR and ALICE Trackers

A novel compact detector module has been produced by the "IReS"-"Subatech"-"Thomson-CSF-Detexis" ... more A novel compact detector module has been produced by the "IReS"-"Subatech"-"Thomson-CSF-Detexis" collaboration. It includes a Double-Sided (DS) Silicon Strip Detector (SSD) and the related Front End Electronics (FEE) located on two hybrids, one for the N side and one for the P side. Bumpless Tape Automated Bonding (TAB) is used to connect the detector to the hybrids by means of microcables with neither wirebonding nor pitch adapter. Each of the six dedicated ALICE128C FE chip [1], located on the hybrid, is TABed on identical single layer microcables, which connect its inputs to the DS SSD and its outputs to the hybrid [2]. These microcables are bent in order to fold over the two hybrids on the DS SSD. This module meets the specifications of two experiments, ALICE (A Large Ion Collider Experiment) on the LHC accelerator at CERN [3] and STAR (Solenoid Tracker At Rhic) on the RHIC accelerator at BNL (Brookhaven National Laboratory) [4]. It can be used with air cooling (STAR) as well as with water cooling (ALICE) [5]. This mechanically self-consistent FE module has been tested on the SPS beam at CERN. Preliminary results are presented.

Research paper thumbnail of Monolithic active pixel sensors for high resolution vertex detectors

A novel Monolithic Active Pixel Sensor (MAPS) for charged particle tracking is presented. The par... more A novel Monolithic Active Pixel Sensor (MAPS) for charged particle tracking is presented. The partially depleted thin epitaxial layer of a low-resistivity silicon wafer is used as a sensitive detector volume from which the charge liberated by ionising particles is collected by diffusion. The sensor is a photodiode within a special structure allowing the high detection efficiency required for tracking applications. Two prototypes have been designed and fabricated using standard 0.6 and 0.35micron CMOS processes. Results of the first prototype are presented, which is made of four arrays, each containing 64×64 pixels with a readout pitch of 20 microns in both directions. Extensive tests made with a soft X-ray source (Fe) and beams of minimum ionising particles (pions of 15 and 120 GeV/c) at CERN have demonstrated the predicted performance. The individual pixel noise of around 12 ENC leads to an extremely favourable signal to noise ratio for minimum ionising particles for which over 100...

Research paper thumbnail of Design and characterisation of a fast architecture providing zero suppressed digital output integrated in a high resolution CMOS pixel sensor for the STAR vertex detector and the EUDET beam telescope

CMOS Monolithic Active Pixel Sensors (MAPS) have demonstrated their strong potential for tracking... more CMOS Monolithic Active Pixel Sensors (MAPS) have demonstrated their strong potential for tracking devices, particularly for flavour tagging. They are foreseen to equip several vertex detectors and beam telescopes. Most applications require high read-out speed, imposing sensors to feature digital output with integrated zero suppression. The most recent development of MAPS at IPHC and IRFU addressing this issue will be reviewed. An architecture will be presented, combining a pixel array, column-level discriminators and zero suppression circuits. Each pixel features a preamplifier and a correlated double sampling (CDS) micro-circuit reducing the temporal and fixed pattern noises. The sensor is fully programmable and can be monitored. It will equip experimental apparatus starting data taking in 2009/2010.

Research paper thumbnail of The APVD readout circuit for DC-coupled silicon detectors

The APVD[1,2], an integrated circuit for the front-end electronics of DC-coupled silicon detector... more The APVD[1,2], an integrated circuit for the front-end electronics of DC-coupled silicon detectors has been developed and produced in the radiation-hard process DMILL for the CMS experiment. This paper reports very briefly on the final test results, more details will be published elsewhere. I. SUMMARY The APVD_DC contains, like other members of the APV[3] family 128 identical analogue channels, each com-posed of a low noise preamplifier, a CR-RC shaper, an analogue pipeline of 160 cells and a signal processing stage[1,2]. A current compensation circuit is added in every preamplifier to sink the leakage current coming from a DC coupled silicon detector. The circuit has been tested and measured in the presence of significant DC-currents up to 11 microampere, without deterioration of the analogue performance of the circuit like pulse shape or dynamic range. The noise increases by about 300 ENC as is shown in figure 1, small compared to the additional shot-noise. Figure 1: The measured ...

Research paper thumbnail of Recent developments and results on APV(DMILL) circuits for silicon and MSGC detectors

For the analogue read-out of the CMS tracking system several variants of the APV design have been... more For the analogue read-out of the CMS tracking system several variants of the APV design have been developed in DMILL technology: the APVD_AC and APVD_DC for AC and DC-coupled silicon detectors, respectively, and a rapid front-end amplifier with 25 ns peaking time based on a bipolar transistor for the possible use of MSGC or silicon detectors. This paper introduces these circuits developed in the DMILL technology and focuses then on experimental results obtained with prototypes on silicon and MSGC detectors in a 200 GeV pion beam.

Research paper thumbnail of A ten thousand frames per second readout MAPS for the EUDET beam telescope

Designed and manufactured in a commercial CMOS 0.35 μm OPTO process for equipping the EUDET beam ... more Designed and manufactured in a commercial CMOS 0.35 μm OPTO process for equipping the EUDET beam telescope, MIMOSA26 is the first reticule size pixel sensor with digital output and integrated zero suppression. It features a matrix of pixels with 576 rows and 1152 columns, covering an active area of ~224 mm. A single point resolution of about 4 μm was obtained with a pixel pitch of 18.4 μm. Its architecture allows a fast readout frequency of ~10 k frames/s. The paper describes the chip design, test and major characterisation outcome.

Research paper thumbnail of ILC Reference Design Report: ILC Global Design Effort and World Wide Study

Research paper thumbnail of A 128 channels analog readout chip ($APVD_{DC}$) for DC-coupled silicon detectors of the CMS tracker

The APVD_DC realised in the DMILL technology is a radiation-hard integrated circuit for front-end... more The APVD_DC realised in the DMILL technology is a radiation-hard integrated circuit for front-end readout electronics of the silicon tracker of CMS. DC-coupled silicon microstrip detectors have significant economical advantages compared to AC-coupled devices mainly due to their less complex fabrication process and better yield. The APVD_DC allows the use of DCcoupled silicon detectors with significant leakage currents as it is expected due to irradiation after several years of LHC operation. In this paper, a solution is presented with an active individual leakage current compensation technique for each input channel. The APVD_DC contains 128 identical analogue channels, each one composed of a low noise preamplifier, a CR-RC shaper, a 160 cells-deep analogue pipeline and an analogue signal processing stage. A deconvolution filter at the latest stage recuperates the initial fast response function of a silicon detector and confines it to one LHC bunch crossing. The 128 analogue channel...

Research paper thumbnail of Design and test of a CMOS low-power mixed-analog/digital ASIC for radiation detector readout front ends

Proceedings Eleventh Annual IEEE International ASIC Conference (Cat. No.98TH8372)

A new CMOS low-power mixed A/D ASIC for radiation detector readout front ends is presented *. Fir... more A new CMOS low-power mixed A/D ASIC for radiation detector readout front ends is presented *. First, we recall the principle of radiation detection system before describing the whole architecture of the circuit. The discussion is then focused on the low-power issue. By means of an innovative 128:1 analog multiplexer, we show how we drastically reduced the mean power consumption without sacrificing constraining specifications such as the input range and the readout rate. Testing mixed A/D, but strongly analog IC is also a big issue which is addressed here. Specific built-in test analog sub-circuits have been implemented in the ASIC, along with a JTAG module used to choose the type of test to perform. This module is also used to control and tune the biasing currents of the circuit. Finally, test results are presented and show that all the specifications are satisfied.

Research paper thumbnail of Radiation hard diamond sensors for future tracking applications

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2006

Research paper thumbnail of MimoStar2 User Manual

Research paper thumbnail of Automatisation des tests électriques de compteurs à micropistes au silicium

Research paper thumbnail of IMOTEPD: a low-jitter16 channels time to digital converter based on delay locked loop for small animal PET imaging applications

Research paper thumbnail of First reticule size MAPS with digital output and integrated zero suppression for the EUDET-JRA1 beam telescope

Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, 2010

A high resolution beam telescope, based on CMOS Monolithic Active Pixel Sensors (MAPS), is being ... more A high resolution beam telescope, based on CMOS Monolithic Active Pixel Sensors (MAPS), is being developed within the EUDET collaboration. Mimosa26 is the first pixel sensor convering an active area of ~224 mm 2 with integrated zero suppression for this telescope. A single point resolution better than 4 μm is obtained with a pixel pitch of 18.4 μm. The matrix is organised in 576 rows and 1152 columns. At the bottom of the pixel array, each column is connected to a offset compensated discriminator to perform the analogue to digital conversion. Digital data are then treated by a zero suppression circuit in order to send useful information. This architecture allows a fast readout frequency of ~10 k frames/s. The paper concentrates on the details of the chip design and its main performances.

Research paper thumbnail of First test results Of MIMOSA-26, a fast CMOS sensor with integrated zero suppression and digitized output

2009 IEEE Nuclear Science Symposium Conference Record (NSS/MIC), 2009

The MIMOSA pixel sensors developed in Strasbourg have demonstrated attractive features for the de... more The MIMOSA pixel sensors developed in Strasbourg have demonstrated attractive features for the detection of charged particles in high energy physics. So far, full-size sensors have been prototyped only with analog readout, which limits the output rate to about 1000 frames/second. The new MIMOSA 26 sensor provides a 2.2 cm 2 sensitive surface with an improved readout speed of 10,000 frames/second and data throughput compression. It incorporates pixel output discrimination for binary readout and zero suppression microcircuits at the sensor periphery to stream only fired pixel out. The sensor is back from foundry since february 2009 and has being characterized in laboratory and in test beam. The temporal noise is measured around 13-14 e − and an operation point corresponding to an efficiency of 99.5±0.1 % for a fake rate of 10 −4 per pixel can be reached at room temperature. MIMOSA 26 equips the final version of the EUDET beam telescope and prefigures the architecture of monolithic active pixel sensors (MAPS) for coming vertex detectors (STAR, CBM and ILC experiments) which have higher requirements. Developments in the architecture and technology of the sensors are ongoing and should allow to match the desired readout speed and radiation tolerance. Finally, the integration of MAPS into a micro-vertex detector is addressed. A prototype ladder equipped, on both sides, with a row of 6 MIMOSA 26-like sensors is under study, aiming for a total material budget about 0.3% X0.