Erwan Le Roux - Profile on Academia.edu (original) (raw)

Papers by Erwan Le Roux

Research paper thumbnail of Modulation Scheme Impact on Phase Noise in FMCW Radar for Short-Range Applications

Modulation Scheme Impact on Phase Noise in FMCW Radar for Short-Range Applications

2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021

This paper presents an analysis of different mod­ulations that can be used at low-IF in short-ran... more This paper presents an analysis of different mod­ulations that can be used at low-IF in short-range frequency- modulated continuous wave (FMCW) radars which are more sensitive to DC offsets and flicker noise. These modulations are also a key functionality in multiple-input multiple-output (MIMO) FMCW radars to implement orthogonality between the different transmit signals. Architectures with two PLLs, set at slightly different frequencies to create a low-IF, and one PLL, using OOK and BPSK modulations, are compared regarding their phase noise at the resulting IF signal. Measurements were performed on a COTS 60 GHz FMCW radar to validate the calculated and simulated results.

Research paper thumbnail of Power-Optimized Digitally Controlled Oscillator in 28-nm CMOS for Low-Power FMCW Radars

IEEE Microwave and Wireless Components Letters, 2021

This work presents the design of a 24-GHz digitally controlled oscillator (DCO) in an advanced 28... more This work presents the design of a 24-GHz digitally controlled oscillator (DCO) in an advanced 28-nm bulk CMOS technology for short-range frequency-modulated continuouswave radar system-on-chip for mobile and Internet-of-Things devices. The power minimization is therefore the primary focus. The oscillator consumes a record low power of 1.2 mW at a 0.65-V supply voltage. It achieves a very large frequency tuning range (TR) of 5.8 GHz (27%) and a 150 kHz resolution without significantly degrading the phase noise (PN). The proposed design methodology results in a state-of-the-art −193 dBc/Hz FoM T .

Research paper thumbnail of Detailed analysis of a phase ADC

Detailed analysis of a phase ADC

Proceedings of 2010 Ieee International Symposium on Circuits and Systems, 2010

This paper presents for the first time a theoretical study of the second order effects of a 4-bit... more This paper presents for the first time a theoretical study of the second order effects of a 4-bit Phase-domain Analog-to-Digital Converter (ADC) circuit for QPSK demodulation and analyzes its benefits and drawbacks. The study encompasses the phase resolution, dynamic range and robustness of this circuit to circuit non-idealities and noise. Our analysis shows that the phase ADC is extremely robust against circuit non-linearities, offsets and noise while providing a large dynamic range compared to traditional amplitude ADCs.

Research paper thumbnail of A 2.4-GHz low complexity polar transmitter using dynamic biasing for IEEE 802.15.6

A 2.4-GHz low complexity polar transmitter using dynamic biasing for IEEE 802.15.6

2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015

Research paper thumbnail of A 0.6mA, 0.9V 100MHz FM front-end in a 0.18μm CMOS-D technology

ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705), 2003

A sub-I V analog front-end for the FM 88-108MHz broadcasting band is presented. This front end in... more A sub-I V analog front-end for the FM 88-108MHz broadcasting band is presented. This front end includes a LNA, two RF amplifiers, I-Q down converters, on chip active polyphase and low-pass Jilters. An RSSI and limiting amplijers are included too. The total current consumption is only 600p4 for a global NF of 5dB. This front-end is suitable for FM and further RDS demodulation.

Research paper thumbnail of A 2.4-GHz low power polar transmitter for wireless body area network applications

Analog Integrated Circuits and Signal Processing, 2014

A 2.4 GHz low power polar transmitter is proposed in this paper. A dynamic biasing circuit, contr... more A 2.4 GHz low power polar transmitter is proposed in this paper. A dynamic biasing circuit, controlled by a digital envelope signal, is used as a direct digital-to-RF envelope converter. It effectively linearizes the input-output characteristic of the overdriven cascode class-C power amplifier used as the output stage, by dynamically adjusting the bias voltage of the cascode transistor. An equivalent baseband model of the transmitter is presented and used to optimize system parameters and give initial assessment of the achievable performance in terms of efficiency and linearity. Based on these simulations, parameters for transistor-level implementation of the bias circuit are derived. The transmitter is designed in a 65 nm CMOS technology. The post layout simulations indicate that the transmitter successfully meets the requirements of the IEEE 802.15.6 standard for wireless body area networks. The simulated amplifier consumes 4.75 mA from a 1.2 V supply while delivering 1.45 dBm of output power with a peak efficiency of 24 %. The entire transmitter, including the PLL, consumes 7.5 mA.

Research paper thumbnail of A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks

A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks

2010 IEEE International Solid-State Circuits Conference - (ISSCC), 2010

Wireless Sensor Networks (WSN) and in particular Wireless Body Area Networks (WBAN) require long ... more Wireless Sensor Networks (WSN) and in particular Wireless Body Area Networks (WBAN) require long autonomy and miniature integrated solutions. While the autonomy in WSN is mostly limited by the energy consumption of the radio [1], WBAN rely on sensors whose power ...

Research paper thumbnail of A 290µA, 3.2MHz 4-bit phase ADC for constant envelope, ultra-low power radio

A 290µA, 3.2MHz 4-bit phase ADC for constant envelope, ultra-low power radio

NORCHIP 2010, 2010

This paper presents an implemented 4-bit phase ADC circuit. It introduces a model to calculate it... more This paper presents an implemented 4-bit phase ADC circuit. It introduces a model to calculate its dynamic range considering second order effects including non-linearity and offsets. The study also encompasses the phase resolution and validates the model with measurement results from the implemented chip. Our analysis shows that the phase ADC is extremely robust against circuit non-idealities and provides higher

Research paper thumbnail of Detailed analysis of a phase ADC

Detailed analysis of a phase ADC

Proceedings of 2010 IEEE International Symposium on Circuits and Systems, 2010

This paper presents for the first time a theoretical study of the second order effects of a 4-bit... more This paper presents for the first time a theoretical study of the second order effects of a 4-bit Phase-domain Analog-to-Digital Converter (ADC) circuit for QPSK demodulation and analyzes its benefits and drawbacks. The study encompasses the phase resolution, dynamic range and robustness of this circuit to circuit non-idealities and noise. Our analysis shows that the phase ADC is extremely robust against circuit non-linearities, offsets and noise while providing a large dynamic range compared to traditional amplitude ADCs.

Research paper thumbnail of Cost-effective and miniaturized System-on-Chip based solutions for portable medical & BAN applications

Cost-effective and miniaturized System-on-Chip based solutions for portable medical & BAN applications

2011 5th International Symposium on Medical Information and Communication Technology, 2011

... Dragan Manic, Daniel Severac, Erwan Le Roux and Vincent Peiris Integrated and Wireless System... more ... Dragan Manic, Daniel Severac, Erwan Le Roux and Vincent Peiris Integrated and Wireless Systems Division CSEM, the Swiss Center for Electronics and ... and costs) based on specific requirements, The icycom RF ULP DSP platform is available in a Development Kit that comes ...

Research paper thumbnail of A low voltage, low power VCO for the 88-108MHz FM broadcasting band

ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705), 2003

A low power, low voltage, VCO for the 88-108MHz FM broadcasting band is presented. Capable of fun... more A low power, low voltage, VCO for the 88-108MHz FM broadcasting band is presented. Capable of functioning down to a supply voltage as low as 0.9V (end of life voltage of an alkaline battery) under all process corners and over an industrial temperature range (-25°C to 75"C), the VCO, running at twice the FM frequency band achieves a tuning range of 30%, a phase noise of-IO3dBc/Hz @ 120kHz offset and features an amplitude regulation mechanism to limit is power dissipation to 180uA. Quadrature LO signals necessary in direct conversion receiver architectures are obtained with a SCL double cross-coupled latch divider-by-2 f o r another 50uA.

Research paper thumbnail of A 2.4-GHz BAW-Based Transceiver for Wireless Body Area Networks

A 2.4-GHz BAW-Based Transceiver for Wireless Body Area Networks

IEEE Transactions on Biomedical Circuits and Systems, 2000

This paper presents a BAW-based transceiver targeting wireless networks for biomedical applicatio... more This paper presents a BAW-based transceiver targeting wireless networks for biomedical applications. The use of high-Q microelectromechanical-systems resonators brings interesting benefits to the fundamental building blocks of the frequency synthesis, receiver, and transmitter and allows achieving at the same time low-power consumption, improved phase noise, and high selectivity in the receiver and transmitter paths. In the baseband, the power consumption is minimized thanks to the use of a phase analog-to-digital converter (ADC) which directly quantizes the phase of the received signal instead of using two separate amplitude ADCs. A complete wireless node composed of the transceiver integrated circuit (IC) and a microprocessing IC, both integrated in a standard digital 0.18-μm complementary metal-oxide semiconductor technology are described and validated by measurement results. The RF carrier phase noise is -136.2 dBc/Hz at 1-MHz offset. The transmitter demonstrates 1-Mb/s Gaussian frequency-shift keying modulation at an output power of 5.4 dBm with an overall current of 35 mA, in compliance with Bluetooth and Bluetooth low energy output spectrum requirements. At the receiver, further investigations are needed to find the origins of an unexpected sensitivity of -75 dBm at 200 kb/s.

Research paper thumbnail of A 2.4-GHz BAW-based transceiver for wireless body area networks

A 2.4-GHz BAW-based transceiver for wireless body area networks

This paper presents a BAW-based transceiver targeting wireless networks for biomedical applicatio... more This paper presents a BAW-based transceiver targeting wireless networks for biomedical applications. The use of high-Q microelectromechanical-systems resonators brings interesting benefits to the fundamental building blocks of the frequency synthesis, receiver, and transmitter and allows achieving at the same time low-power consumption, improved phase noise, and high selectivity in the receiver and transmitter paths. In the baseband, the power consumption is minimized thanks to the use of a phase analog-to-digital converter (ADC) which directly quantizes the phase of the received signal instead of using two separate amplitude ADCs. A complete wireless node composed of the transceiver integrated circuit (IC) and a microprocessing IC, both integrated in a standard digital 0.18-μm complementary metal-oxide semiconductor technology are described and validated by measurement results. The RF carrier phase noise is -136.2 dBc/Hz at 1-MHz offset. The transmitter demonstrates 1-Mb/s Gaussian frequency-shift keying modulation at an output power of 5.4 dBm with an overall current of 35 mA, in compliance with Bluetooth and Bluetooth low energy output spectrum requirements. At the receiver, further investigations are needed to find the origins of an unexpected sensitivity of -75 dBm at 200 kb/s.

Research paper thumbnail of A 2.4-GHz BAW-based transceiver for wireless body area networks

A 2.4-GHz BAW-based transceiver for wireless body area networks

This paper presents a BAW-based transceiver targeting wireless networks for biomedical applicatio... more This paper presents a BAW-based transceiver targeting wireless networks for biomedical applications. The use of high-Q microelectromechanical-systems resonators brings interesting benefits to the fundamental building blocks of the frequency synthesis, receiver, and transmitter and allows achieving at the same time low-power consumption, improved phase noise, and high selectivity in the receiver and transmitter paths. In the baseband, the power consumption is minimized thanks to the use of a phase analog-to-digital converter (ADC) which directly quantizes the phase of the received signal instead of using two separate amplitude ADCs. A complete wireless node composed of the transceiver integrated circuit (IC) and a microprocessing IC, both integrated in a standard digital 0.18-μm complementary metal-oxide semiconductor technology are described and validated by measurement results. The RF carrier phase noise is -136.2 dBc/Hz at 1-MHz offset. The transmitter demonstrates 1-Mb/s Gaussian frequency-shift keying modulation at an output power of 5.4 dBm with an overall current of 35 mA, in compliance with Bluetooth and Bluetooth low energy output spectrum requirements. At the receiver, further investigations are needed to find the origins of an unexpected sensitivity of -75 dBm at 200 kb/s.

Research paper thumbnail of Modulation Scheme Impact on Phase Noise in FMCW Radar for Short-Range Applications

Modulation Scheme Impact on Phase Noise in FMCW Radar for Short-Range Applications

2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021

This paper presents an analysis of different mod­ulations that can be used at low-IF in short-ran... more This paper presents an analysis of different mod­ulations that can be used at low-IF in short-range frequency- modulated continuous wave (FMCW) radars which are more sensitive to DC offsets and flicker noise. These modulations are also a key functionality in multiple-input multiple-output (MIMO) FMCW radars to implement orthogonality between the different transmit signals. Architectures with two PLLs, set at slightly different frequencies to create a low-IF, and one PLL, using OOK and BPSK modulations, are compared regarding their phase noise at the resulting IF signal. Measurements were performed on a COTS 60 GHz FMCW radar to validate the calculated and simulated results.

Research paper thumbnail of Power-Optimized Digitally Controlled Oscillator in 28-nm CMOS for Low-Power FMCW Radars

IEEE Microwave and Wireless Components Letters, 2021

This work presents the design of a 24-GHz digitally controlled oscillator (DCO) in an advanced 28... more This work presents the design of a 24-GHz digitally controlled oscillator (DCO) in an advanced 28-nm bulk CMOS technology for short-range frequency-modulated continuouswave radar system-on-chip for mobile and Internet-of-Things devices. The power minimization is therefore the primary focus. The oscillator consumes a record low power of 1.2 mW at a 0.65-V supply voltage. It achieves a very large frequency tuning range (TR) of 5.8 GHz (27%) and a 150 kHz resolution without significantly degrading the phase noise (PN). The proposed design methodology results in a state-of-the-art −193 dBc/Hz FoM T .

Research paper thumbnail of Detailed analysis of a phase ADC

Detailed analysis of a phase ADC

Proceedings of 2010 Ieee International Symposium on Circuits and Systems, 2010

This paper presents for the first time a theoretical study of the second order effects of a 4-bit... more This paper presents for the first time a theoretical study of the second order effects of a 4-bit Phase-domain Analog-to-Digital Converter (ADC) circuit for QPSK demodulation and analyzes its benefits and drawbacks. The study encompasses the phase resolution, dynamic range and robustness of this circuit to circuit non-idealities and noise. Our analysis shows that the phase ADC is extremely robust against circuit non-linearities, offsets and noise while providing a large dynamic range compared to traditional amplitude ADCs.

Research paper thumbnail of A 2.4-GHz low complexity polar transmitter using dynamic biasing for IEEE 802.15.6

A 2.4-GHz low complexity polar transmitter using dynamic biasing for IEEE 802.15.6

2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015

Research paper thumbnail of A 0.6mA, 0.9V 100MHz FM front-end in a 0.18μm CMOS-D technology

ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705), 2003

A sub-I V analog front-end for the FM 88-108MHz broadcasting band is presented. This front end in... more A sub-I V analog front-end for the FM 88-108MHz broadcasting band is presented. This front end includes a LNA, two RF amplifiers, I-Q down converters, on chip active polyphase and low-pass Jilters. An RSSI and limiting amplijers are included too. The total current consumption is only 600p4 for a global NF of 5dB. This front-end is suitable for FM and further RDS demodulation.

Research paper thumbnail of A 2.4-GHz low power polar transmitter for wireless body area network applications

Analog Integrated Circuits and Signal Processing, 2014

A 2.4 GHz low power polar transmitter is proposed in this paper. A dynamic biasing circuit, contr... more A 2.4 GHz low power polar transmitter is proposed in this paper. A dynamic biasing circuit, controlled by a digital envelope signal, is used as a direct digital-to-RF envelope converter. It effectively linearizes the input-output characteristic of the overdriven cascode class-C power amplifier used as the output stage, by dynamically adjusting the bias voltage of the cascode transistor. An equivalent baseband model of the transmitter is presented and used to optimize system parameters and give initial assessment of the achievable performance in terms of efficiency and linearity. Based on these simulations, parameters for transistor-level implementation of the bias circuit are derived. The transmitter is designed in a 65 nm CMOS technology. The post layout simulations indicate that the transmitter successfully meets the requirements of the IEEE 802.15.6 standard for wireless body area networks. The simulated amplifier consumes 4.75 mA from a 1.2 V supply while delivering 1.45 dBm of output power with a peak efficiency of 24 %. The entire transmitter, including the PLL, consumes 7.5 mA.

Research paper thumbnail of A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks

A 1V RF SoC with an 863-to-928MHz 400kb/s radio and a 32b Dual-MAC DSP core for Wireless Sensor and Body Networks

2010 IEEE International Solid-State Circuits Conference - (ISSCC), 2010

Wireless Sensor Networks (WSN) and in particular Wireless Body Area Networks (WBAN) require long ... more Wireless Sensor Networks (WSN) and in particular Wireless Body Area Networks (WBAN) require long autonomy and miniature integrated solutions. While the autonomy in WSN is mostly limited by the energy consumption of the radio [1], WBAN rely on sensors whose power ...

Research paper thumbnail of A 290µA, 3.2MHz 4-bit phase ADC for constant envelope, ultra-low power radio

A 290µA, 3.2MHz 4-bit phase ADC for constant envelope, ultra-low power radio

NORCHIP 2010, 2010

This paper presents an implemented 4-bit phase ADC circuit. It introduces a model to calculate it... more This paper presents an implemented 4-bit phase ADC circuit. It introduces a model to calculate its dynamic range considering second order effects including non-linearity and offsets. The study also encompasses the phase resolution and validates the model with measurement results from the implemented chip. Our analysis shows that the phase ADC is extremely robust against circuit non-idealities and provides higher

Research paper thumbnail of Detailed analysis of a phase ADC

Detailed analysis of a phase ADC

Proceedings of 2010 IEEE International Symposium on Circuits and Systems, 2010

This paper presents for the first time a theoretical study of the second order effects of a 4-bit... more This paper presents for the first time a theoretical study of the second order effects of a 4-bit Phase-domain Analog-to-Digital Converter (ADC) circuit for QPSK demodulation and analyzes its benefits and drawbacks. The study encompasses the phase resolution, dynamic range and robustness of this circuit to circuit non-idealities and noise. Our analysis shows that the phase ADC is extremely robust against circuit non-linearities, offsets and noise while providing a large dynamic range compared to traditional amplitude ADCs.

Research paper thumbnail of Cost-effective and miniaturized System-on-Chip based solutions for portable medical & BAN applications

Cost-effective and miniaturized System-on-Chip based solutions for portable medical & BAN applications

2011 5th International Symposium on Medical Information and Communication Technology, 2011

... Dragan Manic, Daniel Severac, Erwan Le Roux and Vincent Peiris Integrated and Wireless System... more ... Dragan Manic, Daniel Severac, Erwan Le Roux and Vincent Peiris Integrated and Wireless Systems Division CSEM, the Swiss Center for Electronics and ... and costs) based on specific requirements, The icycom RF ULP DSP platform is available in a Development Kit that comes ...

Research paper thumbnail of A low voltage, low power VCO for the 88-108MHz FM broadcasting band

ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705), 2003

A low power, low voltage, VCO for the 88-108MHz FM broadcasting band is presented. Capable of fun... more A low power, low voltage, VCO for the 88-108MHz FM broadcasting band is presented. Capable of functioning down to a supply voltage as low as 0.9V (end of life voltage of an alkaline battery) under all process corners and over an industrial temperature range (-25°C to 75"C), the VCO, running at twice the FM frequency band achieves a tuning range of 30%, a phase noise of-IO3dBc/Hz @ 120kHz offset and features an amplitude regulation mechanism to limit is power dissipation to 180uA. Quadrature LO signals necessary in direct conversion receiver architectures are obtained with a SCL double cross-coupled latch divider-by-2 f o r another 50uA.

Research paper thumbnail of A 2.4-GHz BAW-Based Transceiver for Wireless Body Area Networks

A 2.4-GHz BAW-Based Transceiver for Wireless Body Area Networks

IEEE Transactions on Biomedical Circuits and Systems, 2000

This paper presents a BAW-based transceiver targeting wireless networks for biomedical applicatio... more This paper presents a BAW-based transceiver targeting wireless networks for biomedical applications. The use of high-Q microelectromechanical-systems resonators brings interesting benefits to the fundamental building blocks of the frequency synthesis, receiver, and transmitter and allows achieving at the same time low-power consumption, improved phase noise, and high selectivity in the receiver and transmitter paths. In the baseband, the power consumption is minimized thanks to the use of a phase analog-to-digital converter (ADC) which directly quantizes the phase of the received signal instead of using two separate amplitude ADCs. A complete wireless node composed of the transceiver integrated circuit (IC) and a microprocessing IC, both integrated in a standard digital 0.18-μm complementary metal-oxide semiconductor technology are described and validated by measurement results. The RF carrier phase noise is -136.2 dBc/Hz at 1-MHz offset. The transmitter demonstrates 1-Mb/s Gaussian frequency-shift keying modulation at an output power of 5.4 dBm with an overall current of 35 mA, in compliance with Bluetooth and Bluetooth low energy output spectrum requirements. At the receiver, further investigations are needed to find the origins of an unexpected sensitivity of -75 dBm at 200 kb/s.

Research paper thumbnail of A 2.4-GHz BAW-based transceiver for wireless body area networks

A 2.4-GHz BAW-based transceiver for wireless body area networks

This paper presents a BAW-based transceiver targeting wireless networks for biomedical applicatio... more This paper presents a BAW-based transceiver targeting wireless networks for biomedical applications. The use of high-Q microelectromechanical-systems resonators brings interesting benefits to the fundamental building blocks of the frequency synthesis, receiver, and transmitter and allows achieving at the same time low-power consumption, improved phase noise, and high selectivity in the receiver and transmitter paths. In the baseband, the power consumption is minimized thanks to the use of a phase analog-to-digital converter (ADC) which directly quantizes the phase of the received signal instead of using two separate amplitude ADCs. A complete wireless node composed of the transceiver integrated circuit (IC) and a microprocessing IC, both integrated in a standard digital 0.18-μm complementary metal-oxide semiconductor technology are described and validated by measurement results. The RF carrier phase noise is -136.2 dBc/Hz at 1-MHz offset. The transmitter demonstrates 1-Mb/s Gaussian frequency-shift keying modulation at an output power of 5.4 dBm with an overall current of 35 mA, in compliance with Bluetooth and Bluetooth low energy output spectrum requirements. At the receiver, further investigations are needed to find the origins of an unexpected sensitivity of -75 dBm at 200 kb/s.

Research paper thumbnail of A 2.4-GHz BAW-based transceiver for wireless body area networks

A 2.4-GHz BAW-based transceiver for wireless body area networks

This paper presents a BAW-based transceiver targeting wireless networks for biomedical applicatio... more This paper presents a BAW-based transceiver targeting wireless networks for biomedical applications. The use of high-Q microelectromechanical-systems resonators brings interesting benefits to the fundamental building blocks of the frequency synthesis, receiver, and transmitter and allows achieving at the same time low-power consumption, improved phase noise, and high selectivity in the receiver and transmitter paths. In the baseband, the power consumption is minimized thanks to the use of a phase analog-to-digital converter (ADC) which directly quantizes the phase of the received signal instead of using two separate amplitude ADCs. A complete wireless node composed of the transceiver integrated circuit (IC) and a microprocessing IC, both integrated in a standard digital 0.18-μm complementary metal-oxide semiconductor technology are described and validated by measurement results. The RF carrier phase noise is -136.2 dBc/Hz at 1-MHz offset. The transmitter demonstrates 1-Mb/s Gaussian frequency-shift keying modulation at an output power of 5.4 dBm with an overall current of 35 mA, in compliance with Bluetooth and Bluetooth low energy output spectrum requirements. At the receiver, further investigations are needed to find the origins of an unexpected sensitivity of -75 dBm at 200 kb/s.